Compiled version: V1.0
LDO selection
1. LDO description
LDO stands for low dropout regulator, which is a low dropout linear regulator. This is relative to the traditional linear regulator. Traditional linear regulators, such as 78XX series chips, require the input voltage to be at least 2V~3V higher than the output voltage, otherwise it will not work properly. But in some cases, such conditions are obviously too harsh, such as 5V to 3.3V, the voltage difference between input and output is only 1.7v, which obviously does not meet the working conditions of traditional linear regulators. In response to this situation, chip manufacturers have developed LDO-type voltage conversion chips.
LDO achieves a fixed voltage output by adjusting the input and output voltage difference of a triode or MOS tube. The basic components are a regulator tube and a voltage reference component. The voltage conversion process is continuous and smooth, and there is no switching action on the circuit. The LDO circuit is characterized by small output voltage ripple, weak load capacity, and low conversion efficiency.
The following are the filter conditions for LDO purchase in the component mall:
Output configuration: positive, negative, positive or negative;
Output type: adjustable/programmable, adjustable, fixed, fixed/adjustable
Number of output channels: 1 to 4;
Maximum input voltage: -40V to 450V (typical value);
Output voltage (fixed): 1.2V, 1.8V, 2.8V, 3.3V, 4V, 5V, 12V, etc. (typical value);
Output voltage (adjustable): 0V to 15V, 0.8V to 5V, etc.;
Voltage drop (max): 1.3V@800mA, 1.6V@1A, [email protected], etc.;
Maximum output current: 10mA to 8A (typical value);
Working power supply current (max): 0.1uA to 700mA (typical value);
Ripple suppression (PSRR): 18dB (1kHZ), 117dB to 56dB (120HZ to 10MHZ);
Operating temperature: 0°C to 70°C, -40°C to 85°C, -65°C to 150°C (TJ), etc.;
Reference package: SOT-23-5, SOT-89-3, SOP-8, LQFP-48, etc.
Brand/Place of Origin: AMS, TI, ST, ADI, ZLG, etc.
Packaging/Method: Tray, box, tube, braid, etc.
2. LDO key indicators and definitions
2.1 Input voltage range
The input voltage range of the LDO determines the lowest available input supply voltage. The device data sheet specifications may provide a wide input voltage range, but the minimum input voltage Vin must be greater than Vout+Vdrop. It should be noted that this has nothing to do with the minimum input voltage given in the device manual.
For example, for the device AMS1117-1.8, Vdrop=1.3V@1A, so the minimum input voltage is typically 3.3V, 4V, 5V.
2.2 Differential pressure
In the differential pressure mode, the adjustment element functions like a variable resistor, and the resistance is close to zero, and the LDO cannot adjust the output voltage. Therefore, the input voltage and load adjustment rate, accuracy, PSRR, and noise parameters are meaningless. The pressure difference should be as small as possible to minimize the power consumption and the highest efficiency. The minimum pressure difference in the mall is known to be 550nV@1A.
For example, for the device AMS1117-1.8, Vdrop=1.3V@1A, it is required to check the minimum voltage difference corresponding to the maximum current.
2.3 Output voltage
The output voltage is one of the important parameters of LDOs. There are two types of LDOs: fixed output voltage and adjustable output voltage.
The fixed output LDO is more convenient to use. It is precisely adjusted by the manufacturer and has high accuracy. Therefore, it is recommended to select a fixed output voltage for the LDO. Do not choose the ADJ function to save components and reduce interference. However, the fixed output voltages are all commonly used voltage values, and it is impossible to meet all application requirements. Whether to choose an LDO with ADJ function is determined according to the input voltage of the subsequent stage circuit.
2.4 Maximum output current
The output current of LDO is limited. The mall provides LDO devices with output current between 10mA and 8A. There are many restrictions to ensure 8A output. Generally, the higher the output current, the higher the cost of the LDO. In order to reduce the cost, the output is generally determined. After the current Iout, leave a margin of at least 25%.
2.5 efficiency
The efficiency of the LDO is determined by the ground current and the input/output voltage. To obtain higher efficiency, the headroom voltage and ground current must be reduced. In addition, the voltage difference between input and output must be minimized. The voltage difference between input and output is an internal factor that determines efficiency and has nothing to do with load conditions.
For example, when using a 5V power supply, the efficiency of a 3.3V LDO does not exceed 66%, but when the input voltage drops to 3.6V, its efficiency will increase to 91.7%.
2.6 Temperature performance
The operating temperature of the LDO is composed of the ambient temperature and the junction temperature. Since the LDO generates heat when it is working, the operating temperature exceeds the ambient temperature.
In the device manual, it is given that the power consumption Pd is related to the maximum operating junction temperature Tj(max), the ambient temperature and the device package type. Pd is (Vin(max)-Vout(min))X Iout(max), where: Pd It is the maximum actual power consumption in the worst case, so it cannot be burned out within the specified operating temperature range when the LDO is loaded.
Different packages have different temperature performance of LDO. Generally, the heating power of SOT-23 package does not exceed 0.3W, and the heating power of SOT-89 package does not exceed 0.5W.
2.7 Power Supply Rejection Ratio (PSRR)
There are often many interference signals in the input source of the LDO, and the power supply rejection ratio (PSRR) reflects the ability of the LDO to suppress these interference signals. The larger the PSRR, the lower the output signal is affected by the input source.
When you want to choose a high PSRR LDO, it depends on the following points:
In the frequency range of 10HZ to 100kHZ, PSRR depends on the performance of the LDO;
In the frequency range higher than 100kHZ, PSRR is more affected by the passive components in the system (use the recommended actual input and output capacitance values, and optimize the PCB without moving and grounding to minimize the crosstalk of external ripple);
When the LDO works close to the differential pressure mode, there is not enough room to suppress the input ripple signal, which will also reduce the PSRR.
For example, the DC/DC switching frequency in front of the LDO is 100kHZ, and the ripple size is 100mV. The ripple size after the LDO can be calculated according to the PSRR characteristic diagram of the device. (For example, 50dB@100kHZ, the ripple after LDO is 0.3mV)
2.8 Output noise
Different from PSRR, the output noise refers to the noise signal generated by the LDO itself. A low-noise LDO can reduce the extra noise generated by the LDO and make the output voltage more pure.
* For example, the AMS1117-3.3 device has an output noise of 0.005% Vout in the bandwidth range of 10HZ to 10kHZ . Therefore, given bandwidth and operating conditions are important considerations when comparing data sheet indicators.
2.9 Load regulation rate
When the load current changes slowly, the general LDO can keep the output constant. When the load current changes rapidly, the output voltage will change accordingly. The change of the output voltage determines the load transient performance. The smaller the value, the better.