FreeRTOS interrupt and priority MSB alignment

FreeRTOS interrupt configuration

STM23 priority uses 4 bits, priority grouping (0 1 2 3 4). In FreeRTOS use, STM32 uses priority group 4 , which are all preemptive priorities . The number of priorities is 16, and the lowest priority is 15.

configMAX_SYSCALL_INTERRUPT_PRIORITY 		// 此宏用来设置在中断服务程序安全调用FreeRTOS API函数的最高中断优先级
configKERNEL_INTERRUPT_PRIORITY      		//此宏用于设置RTOS内核中断优先级
configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY  //此宏用于定义FreeRTOS系统可管理的最高中断优先级(中断优先级阈值)
configLIBRARY_LOWEST_INTERRUPT_PRIORITY			//此宏用于定义中断最低优先级

configMAX_SYSCALL_INTERRUPT_PRIORITY below this priority interrupt API functions can be called FreeRTOS FromISR secure , higher-priority interrupt this FreeRTOS is not prohibited , interrupt service routine can not call the API function FreeRTOS FromISR the
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SysTick and PendSV configured to lowest priority

BASEPRI register

This register can mask interrupts a lower priority than a certain threshold , about to write a macro configMAX_SYSCALL_INTERRUPT_PRIORITY register BASEPRI
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when FreeRTOS control maskable interrupt priority is to control BASEPRI register, write 0 to the register BASEPRI , stop interrupt mask,
shield priority For interrupts not higher than 0x60 (obtained by shifting 0x06 4 bits to the left, that is, the priority number is 6) , use assembly programming:

MOV    R0  ,           #0X60
MSR    BASEPRI  ,      R0

Priority bit analysis

CM3 uses an 8-bit register to express the interrupt priority. The effective number of 8-bit registers is determined by the chip design, but it is allowed to be controlled by at least 3 effective bits , that is, the priority must be at least 8 bits , the smaller the priority value, The higher the priority

Operate the 8-bit register to control the priority and control the high bit (ie, MSB alignment with the most significant bit alignment) . Why do we need to align with MSB instead of LSB? First look at the difference between 4-bit expression priority and 3-bit expression priority .

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MSB alignment migration

MSB alignment migration, when the program is migrated from a 4-bit priority MCU to a 3-bit priority MCU, the situation is shown in the figure:
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you can see that the effective number of priority is reduced at this time, but the logical order of the priority is not changed

LSB alignment migration

LSB alignment, when the program is transplanted from a 4-bit priority MCU to a 3-bit priority MCU, the situation is shown in the figure:


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Caused a priority inversion , low priority has become higher instead

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Origin blog.csdn.net/weixin_44333597/article/details/107605661