Group review
Exam question type:
一、 选择题（16*2=32）
二、 简答题（7*6=42）
三、 分析题（10+16=26）
Computer composition
Von Leumann computer p4~p5
cpi p18
The characteristics of the original code complement and the inverse code shift p30
Fixed point p31
IEEE 754 standard single-precision floating-point number p40
1 + 8 +32
Big-endian and little-endian p52
Understand the zero flag, overflow flag, and carry flag
Instruction format, machine code and mnemonic language interchange
Commonly used addressing method p110
立即寻址，直接寻址，隐含寻址，寄存器寻址，寄存器间接寻址，变址寻址，相对寻址，基址寻址等。
The characteristics and differences between RISC and CISC p119
Answer: RISC is a simplified instruction set computer, CISC complex instruction set computer. Compared with CISC, RISC has fewer instructions, instruction format, addressing mode, more general-purpose registers, combinational logic, and optimized compilation technology, which facilitates the realization of instruction pipeline. RISC is easy to design, low cost, and high reliability.
For example, the X86 architecture uses CISC, and both ARM and MIPS use RISC.
Software and hardware interface
The instruction set architecture (ISA) is at the interface of software and hardware. ISA is an abstraction of hardware. All software functions are built on ISA.
There are short answer questions + multiple choice questions (10-15 points)
Two types and characteristics of cpu controllers p175
Answer: One is hard-wired line controller, and the other is microprogram controller.
The advantage of the hard-wired line controller is that it is fast and suitable for implementing a simple or regular command system. The disadvantage is that it is a huge logic network with multiple inputs and multiple outputs, with a complex structure, difficult to implement and difficult to maintain.
The microprogram controller adopts the principle of stored program, so every instruction must be fetched from the control storage once. It is characterized by regularity, easy maintenance, and flexibility, but its speed is slow.
Assembly language program
Control signal value
(There are big questions, about 20 minutes)
Determination of cpu clock in the pipeline
Data correlation and bypass technology
(Data adventure, bypass technology, competitive adventure)
(About 10 minutes)
Features of SHAM and DRAM p236
Memory hierarchy p238
The locality principle of program access p253
Three kinds of mapping organization p257
Group associative mapping and hit p261 (there is a big problem)
The meaning of quick table
(A mapping table between main memory and external memory.
Fast table hits, cache does not necessarily hit
cache hits, fast table hits)