Xilinx FPGA chips that can be used as storage resources include LUT, BRAM, and URAM:
- LUT = 64bit
- BRAM = 36Kb = 18Kb x 2 = 36bit x 512 x 2
- URAM = 288Kb = 72bit x 4K = 72bit x 4 x 1024
A LUT can be used as 64bit storage space. A BRAM has a capacity of 36Kb and can be used as two independent 18KbBRAMs. For a 36Kb BRAM, the maximum bit width it can achieve is 72bit. Of course, BRAM also supports expansion of bit widths of 1bit, 2bit, 4bit, etc. The URAM capacity is 288Kb, the depth of a URAM is 4K (4 × 1024), and the width is 72b. Therefore, according to the difference in bit width and length of different data in the design, the storage resource type should be reasonably selected.
The initial value of BRAM can be set, whether BRAM is a single port, simple dual port or true dual port, you can set its initial value through the COE file. The initial value of URAM can only be 0, and can not be changed, in other words, the initial value can not be set. This means that BRAM can be configured as ROM and URAM cannot.
