Most electronic systems now need to support hot-swap function, so-called hot-swap, that is, when the system is working normally, a unit of the system is plugged and unplugged with power, and does not have any impact on the system.
There are two main effects of hot plugging on the system: First, during hot plugging, the mechanical contacts of the connector will bounce at the moment of contact, causing power supply oscillation, as shown in the following figure:
This oscillation process will cause the system power to fall , Causing a bit error, or a system restart, may also cause the connector to catch fire and cause a fire.
The solution is to delay the power-on time of the connector. Do not power on the connector within the dozens of milliseconds of the connector jitter ((t1 to t2), wait for the stability of the insertion (after t2), and then power on, that is, anti-jitter delay .
Second, when hot swapping, due to the charging effect of the system's large-capacity energy storage capacitor, a large inrush current will appear in the system. Everyone knows that when the capacitor is charging, the current decreases exponentially (lower left), so At the beginning of charging, the inrush current is very large.
This surge current may burn the fuse of the power supply of the device, so the surge current must be controlled during hot swapping to make it change according to the ideal trend, as shown in the upper right figure. 0 ~ t1 in the figure is the slow start time of the power supply.
In summary, the main function of the slow start circuit is to achieve two functions:
1). Anti-jitter delay power-on;
2). Control the rising slope and amplitude of the input current.
There are two types of slow start circuits: voltage slope type and current slope type.
The voltage slope type slow start circuit has a simple structure, but the change of its output current is greatly affected by the load impedance, while the output current change of the current slope type slow start circuit is not affected by the load, but the circuit structure is complicated.
The following focuses on the voltage-type slow start circuit.
The MOS tube is usually used in the design to design the slow start circuit. The MOS tube has the characteristics of low on-resistance Rds and simple driving, and a small number of components can be added to form a slow start circuit. Normally, PMOS is used for positive power supplies and NMOS is used for negative power supplies.
The figure below is a -48V power supply slow start circuit built with NMOS. Let's analyze the working principle of the slow start circuit.
1). D1 is a clamping diode to prevent the input voltage from being too large to damage the subsequent circuit;
2). The role of R2 and C1 is to realize the anti-jitter delay function. In practical applications, R2 generally chooses 20K ohms, and C1 chooses about 4.7uF ;
3). The role of R1 is to provide a fast discharge channel for C1, which requires that the voltage division value of R1 is greater than the voltage regulation value of D3. In practical applications, R1 is generally selected to be around 10K;
4) . R3 and C2 are used to control power-on The rising slope of the current. In practical applications, R3 is generally about 200K ohms, C2 is 10 nF ~ 100nF;
5). The role of R4 and R5 is to prevent the self-oscillation of the MOS tube, which requires R4, R5lt; <R3, R4 The value is generally between 10-50 ohms, R5 is generally 2K ohms;
6). The role of the clamping diode D3 is to protect the gate-source of the MOS transistor Q1 from high voltage breakdown; the role of D2 is to conduct After the connection, the anti-jitter delay circuit composed of R2 and C1 and the power-up slope control circuit composed of R3 and C2 are isolated to prevent the MOS gate charging process from being affected by C1.
Let's analyze the slow start principle of this circuit:
Assume that the parasitic capacitance between the gate and source of the MOS transistor Q1 is Cgs, the parasitic capacitance between the gate and drain is Cgd, and the parasitic capacitance between the drain and source is Cds, the gate -The capacitor C2 (C2gt;> Cgd) is connected in parallel to the outside of the drain, so the total gate-drain capacitance C'gd = C2 + Cgd. Since the capacitance of Cgd is almost negligible relative to C2, C'gd ≈C2, the turn-on voltage of the gate of the MOS tube is Vth. During normal operation, the source voltage of the gate of the MOS tube is Vw (this voltage is equal to the clamping voltage of the voltage regulator D3), and the time constant of charging the capacitor C1 is t = (R1 // R2 // R3) C1. Since R3 is usually much larger than R1 and R2, t≈ (R1 // R2) C1.
The following analyzes the working principle of the above voltage slow start circuit in three stages: The
first stage: -48V power is used to charge C1, and the charging formula is as follows.
Uc = 48 R1 / (R1 + R2) [1-exp (-T / t)], where T is the time when the voltage of capacitor C1 rises to Uc, and the time constant t = (R1 // R2) C1. Therefore, the time required from power-on to MOS tube turn on is: Tth = -t ln [1- (Uc * (R1 + R2) / (48 R1))]
Second stage: after the MOS tube is turned on, the drain current It starts to increase, and its rate of change is proportional to the rate of change of the transconductance of the MOS tube and the gate-source voltage. The specific relationship is: dIdrain / dt = gfm dVgs / dt, where gfm is the transconductance of the MOS tube, which is a fixed value, Idrain For the drain current, Vgs is the gate-source voltage of the MOS tube. During this period, the gate-source voltage constantly controls the drain-source current. The MOS tube is summarized as a voltage-controlled device.
The third stage: when the drain-source current Idrain reaches the maximum load current, the drain-source voltage also reaches saturation. At the same time, the gate-source voltage enters the plateau period, and the voltage amplitude is set to Vplt. Since the drain-source current Ids remains constant during this period, the gate-source voltage Vplt = Vth + (Ids / gfm), and at the same time, because the fixed gate-source voltage causes the gate current to all pass through the feedback capacitor C'gd, the gate current is Ig = (Vw-Vplt) / (R3 + R5), because R5 is negligible relative to R3, so Ig≈ (Vw-Vplt) / R3. Because the gate current Ig≈Icgd, Icgd = Cgd dVgd / dt. Since the gate-source voltage remains constant during this time, the rate of change of the gate-source voltage and the drain-source voltage is equal. Therefore: dVds / dt = dVgd / dt = (Vw-Vplt) / (R3 C2).
From this formula, we can know that the slope of the drain-source voltage change is related to the value of R3 C2. For a system with a constant load, as long as R3 is controlledThe value of C2 can control the rising slope of the hot swap surge current.
During the slow start phase, the schematic diagram of the changes of the gate-source voltage Vgs, the drain-source voltage Vds and the drain-source current Ids is shown below.
In the 0 ~ t1 stage, the Schottky diode D2 has not been turned on, so Vgs is equal to 0. During this time, the -48V power supply charges C2 through R3 and R5, and when the voltage of C2 rises to the turn-on voltage of D2, the MOS tube The gate voltage of the MOSFET starts to rise. When the gate-source voltage rises to the turn-on voltage Vth of the MOS tube, the MOS tube turns on, and the drain-source current Ids begins to increase. When the gate-source voltage of the MOS tube rises to the platform voltage Vplt The drain-source current Ids also reaches the maximum. At this time, the drain-source voltage Vds enters saturation and begins to fall. At the end of the platform voltage Vplt, the MOS tube is fully turned on, the drain-source voltage drops to the minimum, and the on-resistance Rds of the MOS tube is minimum.
