IC design simulation is an important step indispensable, generally need to record the post-simulation waveform files for detailed analysis and research. Talk about several wave files WLF (Wave Log File), VCD (Value Change Dump) file, fsdb (Fast Signal DataBase) file, shm, vpd:
For WLF waveform log file, as long as we used modelsim, you should all be familiar. WLF (Wave Log File) is supported by Mentor Graphics' Modelsim waveform files. But when we observe the waveform waveform window, at the end of the simulation will generate a * .wlf file (default is vsim.wlf). Next time we can open the saved waveforms directly through modelsim. vsim -view vsim.wlf -do run.do run.do wherein the content of a signal waveform to be viewed. It is emphasized that this wlf file can only be generated by a modelsim, can only be displayed by the modelsim. Not a common file format.
VCD (Value Change Dump) is a common format. VCD file is an ASCII file IEEE1364 standard (Verilog HDL language standard) defined. It mainly contains header information, and change information Variables predefined values. It is precisely because it includes changes in the information signal, recorded the equivalent information for the entire simulation, we can use this file to reproduce the simulation, it can display waveforms. Because the VCD is part of Verilog HDL language standard, so all verilog simulator should be able to achieve this function, but also allows the user to verilog code to dump VCD file system function. We may be generated by the system function dumpfile Verilog HDL waveform, a waveform is generated by the dumpfile to certain predetermined data module and a signal extraction we dumpvars the simulation parameter.
Particular note is that, precisely because of VCD recording of a complete change in the information signal, we can estimate the power consumption of the design by VCD file, and this is the other wave files are not available. Encounter and PrimeTime PX (Prime Power) can be input by netlist files, libraries, and the power consumption information with the VCD file generated after the simulation to achieve power analysis.
Because the VCD is part of Verilog HDL language standard, so all verilog simulator must be able to achieve this function. So we can dumpVCD file system function in verilog code. In addition, we can dump VCD file by modelsim command, which can be extended to in VHDL. Specific command: vcd file myfile.vcd
vcd add / test / dut / * This generates a VCD data containing information on all the dut signal.
We have to simulate using vsim -vcdstim myfile.com
test;add wave /*;run -all;
Or join in the testbench in:
initial
begin
$dumpfile("*.vcd");
$ Dumpvars (0 **);
end
fsdb (Fast Signal DataBase) is Spring Soft (Novas) company Debussy / Verdi wave file support, generally smaller, more widely used, the rest of simulation tools such as ncsim, modlesim etc. can be loaded by PLI Verdi's (usually located in the installation directory the lower share / pli directory) directly dump fsdb file. verdi fsdb file is to use a proprietary data format, similar to VCD, but it is only useful information presented during the simulation signals, remove redundant information in the VCD, VCD data to be like a huffman coding. Therefore fsdb small amount of data, but it will improve simulation speed. We know VCD file using verilog built-in system functions to achieve, fsdb PLI is an interface through verilog to achieve. fsdbDumpfile, fsdbDumpfile, fsdbDumpvars etc.
Testbench added:
initial
begin
$fsdbDumpfile("*.fsdb");
$ FsdbDumpvars (0 **);
end
The remaining waveform file is different from the various emulation or debugging tools supported file type, and do not GM, but the basic can be converted from a VCD file (actually a condensed version of VCD files, because just take the data required for simulation debugging, so file size is much smaller than the original VCD files), and some also provide interoperability with VCD file conversion function.
shm is Cadence's NC verilog and Simvision support of waveform files, .shm is actually a directory, which contains two files .dsn and .trn.
vpd is Synopsys' VCS DVE support of waveform files can be generated with a $ vcdpluson.
By using Cadence NC Verilog testcase comparison to the same conditions and the same waveform dump, shm file generation time of the shortest (nonsense, originally a company), generated vcd file to generate multiple time and shm fsdb time. In the example I tested, fsdb file generated as a dozen MB, shm files to dozens of MB, while the vcd files will have several GB in size.
********************************************************************************
fsdb some usage:
(1) The following is a list, suggesting the possible use fsdb various, specific content we can Google one, they all came out.
fsdbDumplimit - FSDB file size limit How to use?
$fsdbDumpvars([<level>], <scope | signal>*)
fsdbDumpfile - Specifies the FSDB file name
$fsdbDumpfile(“<FSDB name>”)
fsdbDumpvars - Dump variables specified
fsdbDumpSingle - Dump specified signal
fsdbDumpvariable - Dump specified variable VHDL
fsdbSwitchDumpFile - dumping will switch to another file FSDB
$fsdbSwitchDumpFile(“<new FSDB name>”)
fsdbAutoSwitchDumpfile - limit the file size and automatically creates a new FSDB file in the data overload
$fsdbAutoSwitchDumpfile(<file size>, “<FSDB name>”,< number of file>)
fsdbDumpflush - Force to Dump Result to FSDB file
fsdbDumpMem - Dump the contents of the specified memory
$fsdbDumpMem(<reg name>, [<start addr>, [<size>]])
$ FsdbDumpon - Open FSDB dumping
$ FsdbDumpoff - Close FSDB dumping
(1) consisting of a switch method FSDB
Sometimes you want to run a simulation for a long time, but the wave of interest but just short. This time how to switch waveform, the file will not be too large it? We describe a method here. Examples for reference only, we can create a more practical application to a variety of changes.
initial begin
$timeformat(...);
$fsdbAutoSwitchDumpfile(...);
$ FsdbDumpvars (...);
// conditional expressions 1
$ FsdbDumpoff;
// conditional expression 2
$ FsdbDumpon;
End
(2), we are more commonly used in general as well as valuevalueplusargs this task, in test_top in:
valuevalueplusargs("casename=%s",casename)
By the script casename passed in the run time (to vcs / nc SIM_ARG: + casename = $ Testcase_name.fsdb)
If a plurality of run time while facilitating testcase may dumpfsdb while the other is the start time to skip
dump（SIM_ARG: +time=$start_time)
valuevalueplusargs("time=%d",skip)
#skip
(3) different module project in everybody concerned, in order to modify the dump test_top frequent, generally will need to dump the contents of a dumplist
The file is implemented
$fsdbDumpvarsToFile("dump.list");
For example dump.list content # for comments)
0 test_top
#1 test_top
# 0 test_top.dut
#0 test_top.dut.m1
#0 test_top.dut.m2
When used normally add the relevant statements in test_top.v:
reg [100:0] casename;
integer skip, i;
initial begin
if( testtestplusargs("dumpfsdb") ) begin
if( valuevalueplusargs("time=%d", skip) )
#skip;
if( valuevalueplusargs ("casename=%s",casename) )
$ FsdbAutoSwitchDumpfile (300, casename, 30);
else
$fsdbAutoSwitchDumpfile(300,"./test_top.fsdb",40);
$fsdbDumpvarsToFile("dump.list");
end
end
When the simulation run, if from the corresponding 5000ns (root timescale related time unit) at the beginning dump waveform, to vcs / nc parameters
+dumpfsdb +time= 5000 +casename= testcase1.fsdb
Which testcase1 Generally, we will deal with in the script followed by case name associate, it will finish like this after the start dump from 5000
testcase1_000.fsdb, testcase1_001.fsdb like this,
2. In addition the dump.list (name can easily take) set inside just the usual set level settings, like a dump
Level path name
0 test_top.dut.m1
example:
//=================
// dump FSDB wave
interger start_dump;
integer stop_dump;
integer finish_time;
integer result;
reg [8*30*-1 : 0] waveform_name;
initial begin:fsdb_dump
start_dump = 0;
finish_time = 0;
waveform_name = "debussy.fsdb";
if (testtestplusargs("FSDB"))
begin
if(testtestplusargs("DUMP_FILE"))
result = valuevalueplusargs("DUMP_FILE=%s",waveform_name);
$fsdbAutoSwitchDumpfile(150,waveform_name,100);
$fsdbDumpflush;
#start_dump;
//select dump signals
$fsdbDumpvars(0,xx_tb);
end
end
