I. Review
Last post we explain the introduction and TLP TLP Header structure, and lists all types of TLP, as shown below. This blog to explain the core structure of several specific types of TLP ( under the Note icon red ), TLP packet structure these core that we analyze in the next chapter TLP packet type PIO, all transport matters XAPP1052 routines which implement used.
Second, the core business of the type TLP packet analysis
1. The memory read requests and memory write request
Memory read request is a PCIE master to slave TLP packet transmitted, a request from the slave to read data. If the host is a PC, the PC requests data from FPGA, if the FPGA as host PC to request data from the FPGA. This TLP is a request packet to the slave only, the other did nothing. Memory read request TLP header three or four double words, is without data (only a read request), the read request if the address is 32-bit, double word is 3; if the read request address 64, the four pairs of compared words, the last double word is the low 32-bit 64-bit address. Here, we first no matter how the data is read to the memory read request realize the function just so.
Memory write request TLP is a packet transmitted from the PCIE host machine, the host data that need to occur directly inside the TLP transmission comes to past, tape is directly