CPU-related knowledge to expand
1, the type of CPU architecture, features and application scenarios.
- The ARM:
Characteristics:
low power consumption function is strong, a number of 16-bit / 32 pairs instruction set and partner.
1, small size, low power consumption, low cost, high performance;
2, support the Thumb (16-bit) / ARM (32-bit) dual instruction set, can be well compatible with the 8/16-bit devices;
3, extensive use of register instruction executes faster;
4, most data operations are completed in the register;
5, flexible and simple addressing modes, high efficiency;
6, fixed length instructions.
Applications:
mobile phones, tablets and other smart mobile devices - X86
Features:
X86 uses a CISC instruction set. In various CISC instruction set of instructions, about 20% of the instruction is repeatedly used, 80% of the entire program code. While the remaining 80% of the instruction is not frequently used, only 20% in programming
applications:
Andrews - The MIPS
. 1, all instructions are 32-bit encoding;
2, the operation principle all requirements must be completed in one clock cycle, a stage of operation;
3, has 32 general purpose registers, each register 32 (for 32-bit machine) or 64 (for 64-bit machines);
4, does not have any operator assistance determination flag register, the corresponding function is to be achieved, it is done by testing whether the two registers are equal;
5, all the operations are 32-bit, byte and no half word operation (MIPS, the word is defined as 32-bit, 16-bit half-word is defined as);
6, no separate stack instruction, all stack operations are unified memory access mode;
7, since the MIPS instruction length is fixed, so that the resulting compiled: binary file and memory space to be larger than x86, (x86 average instruction length of only 3 bytes of the multi - point, and a 4 MIPS byte);
8, addressing modes: only one memory addressing mode. It is a 16-bit base address plus the offset address: data memory access must be exactly aligned (at least 4 byte aligned);
9, branch target address only 26 bits, plus two alignment bits, be found address space of 28 bits, i.e. 256M; only 16-bit conditional branch instruction jump address, plus two aligned position, a total of 18-bit addressing space, i.e. 256K; MIPS default return address does not handle the number of Li (call is function victims instruction address) stored in the war, but stored in the S31 register, which is beneficial to those leaves function.
Application:
RISC processor
2, which operating systems can be used as an embedded operating system?
Portable Operating System can collectively called embedded operating system.
Usually open source code, to provide an interface portable.
The device can be used as an embedded CPU.
