table of Contents
Timer interrupt experiments
S3C2440 provides three clock: FCLK for CPU core; HCLK for the AHB bus device, such as a memory controller, interrupt controller, LCD controller, DMA, and the USB host, but also can be used in special cases CPU core; PCLK devices on the APB bus is used, such as the watchdog, IIS, IIC, PWM timer, ADC, UART, GPIO, RTC and SPI.
In general, AHB bus is mainly used for high-performance module, APB bus used to connect peripheral devices between the low bandwidth.
Total S3C2440 timer clock source as the PCLK, by first reducing the frequency of two 8-bit prescaler, a first timer prescaler share 0,1, 2,3,4 share the second pre timer frequency divider; after prescaler frequency divider output will be selected Rd processing of the second stage, after the timer for each selection.
Introduce the principle of
Selected clock frequency
S3C2440 SoC contains five internal 16-bit timers, timer0, timer1, timer2, timer3, timer4. Before the timer also has four PWM (Pulse Width Modulation) function, and because the first timer 5 timer4 no external output pin, it does not have the PWM function. Meanwhile Incidentally, since the timer timer0 generator further having a dead zone, so it can be used to drive current equipment.
Seen from the figure, timer0 timer1 and a shared 8-bit prescaler to reduce the frequency; timer2, timer3 timer4 share and another prescaler. After the prescaler out, we will enter the second stage of the 5-way to select the divider, respectively. 5 can select the way selection divider 2 frequency, divided by 4, divide by 8, divide by 16 or directly use an external clock TCLK0 / TCLK1. Each timer can be used to select the clock frequency of each of the 5 frequency from out of the second fraction.
For prescaler, we can be set by TCFG0 register. For the second stage the selected clock frequency, is selected by the register TCFG1.
Timer internal control logic
After that time the clock divider set up, we began to look at setting the timer itself. First, we need to set the initial counter
