Notes ------ Operating System Storage Management (2)
Paged memory management
Objective: To reduce the zonal distribution of a fraction of the problem of waste inside and outside.
Idea: The goal of the program is divided into several pages (page), here is the page for the logical address in terms of linear address. Also divided into several memory page frames, a frame is divided into specific physical address of the page (page) of the same size page frames, which guarantees the pages can be mapped between the loading and the page frame. Each page frame can be any page loads, the runtime determines the minimum division unit for dividing the space by the page and page frame.
Key issues: Page / Page box size; the logical address structure; which records each page stored in the page frame; how to properly run the program (address relocation)? When the implementation of cross-page instruction; storage (memory) Protection
Page table
Achieved from the page number to a physical block number address mapping.
Each process has its own page table, a page table stored in memory; the page table origin address is stored in the PCB;
process control block (PCB) data structure is a specialized system for the setting management process. The system used to record external features which process, during motion of the process described. At the same time, the system can use to control and manage the process of PCB.
Page Size
Page too small : Memory Utilization (within a fraction) high, increasing the number of pages. Page table occupied space becomes large, it takes up memory.
Page too : Memory utilization (in the fraction) is low, reducing the number of pages. Page table occupied space becomes big or small, to save memory.
Normal size : integer power of 2, 1KB ~ 8KB
Address structure
Page number + inner page address Part 2
Address Relocation
The address conversion unit / address mapping mechanisms:
between the actual operation of the logical addresses and physical addresses, the same portions or pages within the page frame address offset, so that when implementing logical addresses to map the virtual address corresponding to the long the page number is converted to the corresponding page frame number on it.
Figure above the logical address corresponding to the acquired page number, the corresponding page frame number acquired from the page table, out of bounds its first judgment, if the page table does not exceed a length that is in the page table, the page table address obtained by Register the starting position of the page table, obtained by adding the corresponding page frame number, can be synthesized by the physical address page frame number and the page address.
There is also a corresponding page table access control information.
Role page table :
- Page frame position of each page where the recording program, support relocation address (address mapping)
- Implement page access control, memory protection, restrict running within the operating system specified memory area.
Fast table
Alias : associative memory (associative memory) (associative memory); Intel terms: TLB (Translation lookaside buffers)
Objective : To adapt to the speed gap between the cpu and memory, improving performance issues page table access, access to the page table needs access 1 memory variable (page table), to access the secondary address (processing logic addresses and physical addresses): + variable page table.
Realization : Set inside the CPU ; has a parallel lookup capability; the temporary page table entries currently in use ; size: 16-512. It can reach more than 90% hit rate.
Fast table is stored in a portion of the page table cache.
So that when its address mapping, will first see whether fast table contains related records, if there is a direct address mapping, if there is no longer accessible memory page table to address mapping.
Two page tables
When the memory is very large, we will be divided into a number of pages, then the size of the page table will become very large, if you want to look for a contiguous space in memory to store such a large table will reduce the use of page rate, in response to this situation, we use two page tables. Part of the page table entry for the page table page, the page table to generate a discrete layer of page tables, each read, just take need to be read into memory.
Two page table address structure:
reading start address of the corresponding page table page table outer Specifically reading, together with the corresponding page numbers to read the corresponding page frame number, the last page offset address mapping in accordance with physical address.
When a larger amount of memory that can be extended multi-level page table, but increases with the progression of the page table, the corresponding address mapping time will increase.
Segmented memory management
In paged memory, the smallest division of a page is divided, but in the actual programming, we used to use to block the relevant data protection or information sharing, so in order to facilitate this operation proposed fragmentation .
The main problem: block division; the logical address; each record stored in the segment memory location; how the program is running properly (address relocation)? Implementation of the directive when cross segmentation? Memory (RAM) Protection
Segment table
Segment (Segment) : segment was a meaningful information set by the programmer to complete the divided segments; segment of variable length ; instruction absence of cross-sections ;
segment table : mainly found in the memory of each logical segment position corresponding to each segment has a segment table entry records the start address of the segment in memory (also referred to as a "base address") and the length of the segment. Refers to a logical start address of the memory address mapping to the starting address, length is the length of segment segment can check the address bounds. Segment table also contains corresponding access control information.
Segment tables stored in memory; segment table origin address is stored in the PCB;
Address structure
Comprising a segment number and a segment address portion 2.
Address translation
Similar to the above dispensing tab, the segment address is within the logical addresses and physical addresses corresponding to the same, the actual operation, first fast searching of a table by the segment number, if no access to the segment table, first segment table for determining bounds, if not at the limit start address of the segment studied, then the start address as the starting address of a physical segment, plus the offset within the segment is the actual physical address.
The role of the segment table :
- Recording program memory location of each segment; support relocatable addresses (address mapping)
- Implement access control segment; storage protection, to limit the operating system to run in the specified memory area.
Information Sharing
Information Sharing tab
is provided with one or more shared data storage page frame.
Sharing segment information
provided to store one or more segments share data.
Segmentation and paging compare
Section on page storage management
Although the segmented memory management logic to solve the space division of the program, but there are many within a fraction of fragmentation debris division. We can pass on the stage of re-allocation scheme paging division.
+ Segment tab
paging system: responsible for resolving main memory allocation, memory allocation by page;
segmented system: responsible for resolving the logical address space management, logical address space allocated for an application by segment;
Segment table and page table
And set in the segment table and page table page storage segment in the segment table contains for logically divided into segments, each segment is divided into logical pages a number, so the segment table records the status of the divided sections, further record the page table partitioning information of each segment within. Corresponding to the plurality of page table corresponding to the case where the recording of each page segment memory and page frame. The actual programs or segments to divide the logical address, the memory is divided into pages as a minimum unit, then the segment table by mapping information to each segment of a page table, then the page table memory pages mapped to each segment the page box.
Address structure
By a segment number and page number plus an offset address components.
Address translation
First, the segment information table at runtime by the process control block (PCB) to read the segment table register, the segment number is compared with the segment table length, it determines whether the bounds, if not at the limit, information corresponding to the page table is read by the length of the page table page number to determine whether the bounds, if not at the limit position is read out in accordance with the segment table page table page table information, to perform address mapping (plus the page frame corresponding to the read page number, page frame number No. plus-page address).
Structure of the table containing the faster, the faster the table stores the segment number and page number corresponding to the page frame number, of the first fast access to the tables to the segment table when the access, if the corresponding entry can be found address mapping otherwise, the above segment to be accessed page table (three access memory).
