Note that the standard is not the answer, but my answer, to welcome you all to come to correct errors heavyweights.
First, select
1. Which of the following actions will cause the CPU to enter the kernel mode
(1) executing a trap instruction (2) performing IO operations (3) abnormal (4) performs the calculation operation
A. (1)
B. (1) (2)
C. ( . 1) (2) (. 3)
D. (. 1) (2) (. 3) (. 4)
Solution: CPU enters the kernel mode instructions executed at this time may cause some change in the value of the instruction register, say trap instruction, I / O operations, abnormal, but the calculation is not required. So this title selected C
2, the system interrupts occur once have up to a process of switchover is
A. to
B. False
Solution: once interrupted, first of all to stop the current process, then the state of the current process of change; then execute the interrupt operation; after executing the interrupt operation, and then select a process begins execution in the ready queue, then the process is not necessarily performed before we stop the process, change the process state, so is wrong. This title selected B
3, according's Law Amdahl's:
A. With the increase in the number of nodes in parallel, earnings performance increases linearly
B. parallel with the increase in the number of nodes, performance can continue to grow
C. even increasing the number of nodes in parallel, performance capped
D. Performance speedup determined by the number of parallel nodes in the system
Solution: Amdahl's Law tells us that, in parallel with the increase in the number of nodes, the performance will increase, but will not have growth, can only approximate a line. So this title selected C
4, Peterson algorithm
A. a processor may be executed out of order
B. Flex is critical Areas Solution
C. can not be used for synchronization between three or more of the process and
D.flag [i] = true and turn j = the order of the two statements may be exchanged
Solution: Peterson algorithm is a method to solve the critical problem areas on a piece of software, only for synchronization between the two processes, and the order of the statements can not be interchanged, so the processor does not apply to order execution. This title selected C
5, the following statements are true about virtual memory is:
A. Memory is enabled without using virtual memory management
B. Virtual memory uses disk storage as a backup
C. After enabling virtual memory can not be used segmented memory management
D. No matter what kind of computer architecture, and virtual memory is enabled as long as the physical frame to allocate a process to make the process of running.
Solution: virtual memory management is still built on top of physical memory, A wrong; the use of disk as virtual memory to expand the memory, making the process do not need to completely into memory, B for; Enabling Virtual Memory can still use segmented memory management, but the segments may need to establish (document storage), C paged on the wrong basis; some instruction may span three or even more than (say, a mov instruction, a data 1, data a 2) so a minimum of physical frame process is not required 1 usually need to go through calculated, D wrong. This title selected B
Second, the short answer questions
1. What is the degree of multi-channel programs (degree of multiprogramming), its upper limit is determined by which factors?
Solution: the degree of multi-channel program is the operating system will be how many processes into memory, or say how many processes are allowed to run on the CPU preemption. There are constraints limit the number of CPU cores, the scheduling algorithm employed, the size of memory
2, please explain why for the scheduler to distinguish between CPU-bound program and I / O bound program important?
Solution: The process can be divided into primary CPU I / O master, representing the current process requires the main CPU or data operations require I / O devices for data input and output. I / O is often greater than the main operation time of the main CPU, so the scheduler should select a reasonable process comprises a combination of I / O to the primary CPU in order to ensure that the main CPU utilization and throughput of the process
3. Describe the optimal page replacement algorithm, and explain why it is optimal.
Solution: Optimal page replacement algorithm is a "forward-looking" future algorithm, it is difficult to achieve in reality, because of its need to refer to the future of knowledge. He is confronted with the need for page replacement will be selected in the current page in a page within the next longest time will not be used as a sacrifice page. Because the sacrifice of the page will not be used in the longest time in the future, thus the optimal page replacement algorithm page replacement rate is the lowest.
4, a demand paging system, each process has its logical space 128 pages of 4KB. Host owns the physical space 4MB.
(1) Composition write logical address format.
(2) Excluding access to place, process's page table how many entries? Each page table entry must contain at least how many?
Solutions:
(1) Because of 128, it is necessary to represent the page number 7; the page size is 4KB, so it is necessary to represent the page offset 12, so its logical address is: where 19 to 18
( 2) because each process is 128, so each process's page table up to 128 (ManDaManSuan). And since the physical space 4MB, the frame should be divided into 4KB in size, you can have a total power of 10 physical frames 2, therefore, each page table entry 10 needs power from the physical frame represents a frame 2, so page table entries need at least 10
5. Explain the relationship between the state and the security deadlock.
Solution: Security security state represents the sequence there is a process, you can ensure that deadlock does not occur; the same token, the deadlock on behalf of the security does not exist a sequence of processes, the deadlock has occurred. Therefore, the sentence is "safe state will not deadlock, deadlock will be unsafe state"
Third, the UFS file system, the node contains the inode file pointer 15, wherein the direct pointer to the block 12, the remaining three pointers point to an indirect block, two and three indirect block indirect block, if the block size is 4KB, account for file pointer 4B, calculate the maximum file size supported by the system is the number (accurate to KB). And explains the main advantage in supporting different file size of this design.
Solution: personal understanding is the case:
three Videos not
it can be seen, firstly, a direct pointer index file may indicate the size of 12x4 = 48KB
then, is an indirect block, will have 2 10 file pointer, each pointer points to the space of 4KB, which can represent 2 10 X4 = 2 12 is KB size
two indirect block Similarly, will have 2 10 file pointer blocks, then there are two 10 X2 10 files pointers, each pointer to the space of 4KB, i.e., can represent 2 20 is X4 2 = 22 is the size of KB
three indirect block Similarly, there will be 2 10 X2 10 file pointer blocks, then there are 2 10 X2 10 X2 10 file pointer, each pointer points of 4KB space, i.e., can represent 2 30 X4 = 2 32 KB size
together, may represent that the maximum size of the file, that is 2 32 + 2 22 +2 12+ 48KB in size, probably less than 5TB look like it.
Such design case, in the face of files of different sizes, can guarantee the access speed of small files faster, and can support no matter how irregular the size of the file
Fourth, a system, provided the page size of 512 bytes, int-type data length of 4 bytes, assuming the array A at the start position of a page, and all pages were not occupied by the array A physical distribution frame, the system the total number of the physical frame is assigned to the process 64, using LRU page replacement algorithm. For the following procedures:
int A[][] = new int[128][128]
for( int j=0; j<128; j++)
for(int i=0; i<128; i++)
A[i][j] = 0
(1) Calculate the number of page faults occur, and the corresponding reasons.
(2) by rewriting the program, so that the minimum number of page faults occur.
Solution: First, clear, LRU algorithm is to sacrifice all pages the current page has not been referenced longest, is a "backward-looking" paging algorithm.
Then look at the array, since the array is assigned when allocated in rows, i.e., A [1] [n] will be assigned together. And an int size is 4 bytes, a page size of 512 bytes, a page description array elements 128 can accommodate, just one line. Therefore, the specific allocation shown in FIG:
According to the algorithm can be seen, each time a new page will take a the element, it is possible to obtain the following cases:
① a start, the 64 will be filled with all of the physical frames, At this page replacement will occur 64 times:
② starting on page 65, page replacement occurs, until all 64 frames to re-replacement again, there were 64 pages replacement:
③ then back to the first page, this time also page replacement occurs after 64 times, return to this situation:
④ ② then returned to circulation, 128 until the end of
this you can see, there have been 128 * 128 page replacement, that is, page faults = 2 14
(2) because it is page fault line change frequently caused by too high, it is only necessary to change the order i and j on it
int A[][] = new int[128][128]
for( int j=0; j<128; j++)
for(int i=0; i<128; i++)
A[j][i] = 0
五、一座小桥（最多只能承重两个人）横跨南北两岸，任意时刻同一方向只允许一个人过桥，南侧桥段和北侧桥段较窄只能通过一个人，桥中央一处宽敞，允许两个人通过或歇息。试用P（wait）V(signal)操作实现行人（进程）的过桥同步，请给出同步设计的理由和相应的伪代码。
解：共需要三个信号量，num用来控制桥上人数，初值为2，表示桥上最多有2人；N用来控制北段桥的使用，初值为1，用于对北段桥互斥；S用来控制南段桥的使用，初值为1，用于对南段桥互斥。
num=2;
N=1;
S=1;
南岸的人：
void ston(){
P(num)
P(S)
通过桥南侧
到达桥中间
V(S)
P(N)
通过桥北侧
V(N）
V(num)
}
北岸的人：
void ntos(){
P(num)
P(N)
通过桥北侧
到达桥中间
V(N)
P(S)
通过桥南侧
V(S）
V(num)
}
六、 In demand paging（请求分页），the page table of a process is as following（某进程的页表如下）.
假定页面大小为4K，为该进程分配的物理帧数固定为2，采用最近最少使用页面置换算法（LRU）和局部淘汰策略；一次内存访问时间是100ns，一次快表（TLB）的访问时间是10ns，处理一次缺页（page fault）处理的时间为8ms（包含更新TLB和页表的时间）；TLB初始化为空，地址访问时，先访问TLB，若TLB未命中，再访问页表（忽略访问页表之后的TLB更新时间）；有效位为0，表示页面不在内存中，产生缺页处理。设有虚拟地址访问序列2082H、1324H、204H，请计算：
1、 依次访问该序列地址对应的各个物理内存所需要的时间；
2、基于上述访问序列，虚拟地址465H对应的物理地址；
3、若希望请求分页时内存的有效访问时间（EAT）为120ns, 缺页的概率应该控制在多少之内。
（1）首先确定这三个虚拟地址所在的页，由于页面大小为4K，所以1代表着0-1000H，2代表着1000-2000H，3代表着2000-3000H。
可以看出来，2082H在第3页、1324H在第2页、204H在第1页。所以可以知道，访问的顺序是3、2、1。
①在访问第3页的时候，先访问TLB（10ns）不在，再访问页表（100ns）在，返回（100ns）
②在访问第2页的时候，先访问TLB（10ns）不在，再访问页表（100ns）不在，此时触发缺页处理（8ms），由于第3页之前用过了，所以将第1页也就是页号为0的页进行置换，返回（100ns）
③在访问第1页的时候，先访问TLB（10ns）不在，再访问页表（100ns）由于第二步已经换出，所以不在，触发缺页处理（8ms），由于第2页刚刚用过，所以将第3页也就是页号为2的页进行置换，返回（100ns）
Finally, the time required is 10 + 100 + 100 + 10 + 100 + 100 + 10 + 100 + 100 + 8x10 . 6 + 8x10 . 6 = 16000630ns
(2) can be known, 465H at the first page, i.e. the page number is 0, physical address = 566H 101H + 465H
(3) according to the formula, EAT = (1-a) X100 + ax8x10 6 ≤120
where, a missing page probability of ≈0.0000025
Note: This question I count myself very lost, parameters feeling a little problem, 8ms and it is too much difference compared to 10ns, really no problem?
