In this chapter, we continue to learn from several registers to access memory angle
3.1 of words in memory storage
The small end of the word: low byte of the word stored in the lower portion of the high byte stored in high address unit
3.2DS和[address]
[...] denotes a memory unit, [...] indicates the offset address 0 of the memory cell.
8086CPU data is automatically taken ds of the memory cell segment address
8080CPU not supported directly into the data segment register operation, a segment register DS, so mov ds, 1000H this instruction is illegal. So how will 1000H ds into it? We had to use a register to transfer, i.e. into a first general register 1000H, such bx, bx and then the contents into ds.
3.3 word transmission
3.4 mov, add, sub command
3.5 Data segment
3.1-3.5 Summary:
3.6 Stack
Stack is a special way of accessing storage space.
Stack mechanism provided 3.7CPU
8086CPU of pushing and popping are performed in word units.
An important question is: how CPU know 10000H ~ 1000FH this space is treated as a stack to use?
You need to know which unit is the top of the stack unit, but, how do you know it?
How do I know the current location of CPU instruction to be executed where? We now know the answer, that is, CS, IP address stored in the segment and offset address of the current instruction. The question now is: how the CPU to know the location of the top of the stack? Obviously, there should be a corresponding register to store the address of the stack, 8086CPU, there are two registers, segment registers SS and SP registers, stack segment address is stored in the SS, the offset address is stored in the SP. Any time, SS: SP points to the top.
push ax execution, carried out by two steps :( automatically following the two steps)
1.SP = the SP-2, the SS: the SP points to the current top of the stack in front of the unit to the top of the stack in front of the current cell to the new top of the stack
2. The contents of the ax fed SS: SP points to the memory cell at, SS: SP at this time point to the new top of the stack.
From the figure, we can see that, 8086CPU in, when the stack, the stack growth from higher addresses to lower addresses.
Note: In Figure 3.12, after the stack, SS: SP points to the new top of the stack 1000EH, pop the top element before the operation, at 2266H 1000 CH persists, however, it has not stack. When performing push again the stacking operation and the like, it will be overwritten.
3.8 stack cross-border issues
Stack of bounds is dangerous, because since we will arrange some space for the stack, then it is possible to store the data that has other uses, such as in the code space outside the stack space, these data, the code may be our own program and it may be another program (after all, a computer system is not only our own programs running). But because we are not careful when popping the stack, and these data, accidentally rewrite the code, will lead to a series of errors.
For 8086CPU no such register (CPU register by detecting the upper limit of the stack, detected by the bottom of the stack register to ensure that no super-sector pop instructions when executed when execution of push instructions)
That is to say, 8086CPU only know where the stack, we do not know how much stack space arrangements.
We have to worry about the problem of the stack of bounds when programming their own, based on the maximum stack space might be used to arrange the stack size.
3.9push, pop command
Must pay attention to: its execution, the content of the first recording stack offset address SP register is decremented by 2, such that the SS: SP points to the new top of the stack unit, then the data register into the SS: SP the new top of stack point unit.
At the same time, push and pop instructions also change the contents of the SP (automatic)
We should be very clear that, push and pop instructions with different mov instructions, CPU instruction execution mov a single step, it is transmitted, and perform push, pop instruction but requires two steps. When performing push, two CPU's operation is: first change SP, after the SS: SP passed.
Note that, like the stack Push and pop operation command, but modify the SP, that is, the maximum variation range of the stack is 0 ~ FFFFH.
Stack is a very important mechanism must be in-depth understanding, flexibility.
3.10 stack segment
Summary paragraph:
We can be defined as a section of memory segments, with the segment address indicating a segment, with the segment offset address access units. This is entirely our own arrangements.
We can store data with a segment, it will address on DS, it will be defined as "data segment." When using instruction mov, add, sub peer access memory unit, CPU will content data segment defined as our data access.
We can use a stored segment of code, it will be in the CS segment address, which is defined as the "Code", the first instruction in the segment offset address in the IP, the CPU will perform so we define the instruction code segment.
We can use as a stack segment, the segment address in which the SS, it is defined as "stack segment", the offset address in the stack unit SP.
A section of memory, can store both code space, but also the data storage space can also be a stack space can also be nothing. The key point is that the CPU setting registers, i.e. CS, IP, SS, SP, DS of