I wrote together with Makefile (eight)

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1. Multi-line variables

  There is also a set of variable values ​​is to use the define keyword. Use the keyword define variable values ​​can be set wrap, which is conducive to define a series of commands (we talked about earlier, "the command packet" technology is the use of the keyword).

  define with the indicator followed by the name of the variable, while the value of re-starting line-defined variables, the definition is the end of endef keywords. And its working mode "=" operator is the same. May comprise a value of the variable functions, commands, text, or other variables. Because command needs to start with [Tab] key, so if you use the command variable is not defined to define [Tab] key to begin with, then it will make not considered a command.
  The following example demonstrates define usage:

    define two-lines
    echo foo
    echo $(bar)
    endef

 

2. Environment Variables

  Value system environment variables make runtime can be loaded at run-time to make the beginning of the Makefile, but if the Makefile has been defined this variable, the variable or by the command line into the make, then the system environment variable covered. (If you make specified "-e" parameter, then the system environment variables will override variables defined in the Makefile)

  So, if we set "CFLAGS" environment variable environment variables, then we can use this variable in the Makefile in all the. For this we use a unified compiler parameters are relatively large benefits. If Makefile defined CFLAGS, then it will use this variable in the Makefile, if no value is defined system environment variable is used, a common and unified personality, much like "global variables" and "local" features.
  When make nested calls (see previous "nested calls" section), the variables defined in the upper Makefile passed to the lower layer by way Makefile system environment variables. Of course, by default, it will only be passed through variable command line settings. The variables defined in the file, if the lower Makefile To pass, you need to use exprot keyword to declare. (See above)

  Of course, I do not recommend to many variables are defined in the system environment, so that when we do not execute the Makefile, have the same set of system variables, which could bring more trouble.

 

3. The target variable

  In front of variables defined in the Makefile we are talking about is "global variables" in the entire file, we can access these variables. Of course, except for "automatic variable", such as "$ <" and the amount of this kind of automatic variables are "rule variable", the definition of the value of this variable depends on the rules of the target and the target-dependent.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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Origin www.cnblogs.com/zhuangquan/p/11890989.html