1, the variable a is a 64-bit signed integer, the initial value by hexadecimal notation: 0x7FFFFFFFFFFFFFFF; variable b is a 64-bit signed integer, the initial value by hexadecimal notation: 0x8000000000000000. The result of a + b is expressed as a decimal number?
A.1
B.-1
C.263+262+…+22+21+2^0
D.–(263+262+…+22+21+2^0)
2, TCP three-way handshake to establish a connection, the package will contain the mark of the second handshake send the most accurate description?
A.ACK
B.SYN, ACK
C.SYN, PSH
D.SYN
3, the stack is a last-out data structure. Given an initial state of size 3 stack is empty, a known set of data after the stack, the final data order: 1324, ask push raw data that can not be set below?
A.2 3 1 4
B.1 4 2 3
C.4 2 3 1
D.3 1 2 4
4, the circuit wherein three NAND gates, AND gates, OR gates are schematic and properties as follows:
a NAND gate, so that the input level programming levels opposite:
an AND gate, two high level input, output high, outputs a low level in other cases:
an oR gate. If and only if two low level input, output low, otherwise the output is high:
now a high level are inputted continuously following circuits A and B pin (1) and a low level ( 0), asked pin C final circuit, level D, E, F, respectively, what is the output?
The AC = 0, D =. 1, E = 0, F. =. 1
B.C. =. 1, D =. 1, E =. 1, F. = 0
C.C. =. 1, D =. 1, E = 0, F. =. 1
the DC = 0, D = 0, E = 0, F = 1
5, the operating system can use the LRU (least recently used) memory data out of the old policy, if memory needs to load new data but space is inadequate, it will be sorted by last access time, and the oldest data is eliminated, assuming now 5 is a memory space, the original data is not in memory, the memory access order data is as follows: 1,2,5,3,4,6,1,4,3,6,7,8,3,9
A. Page number missing:. 9
B. number of page faults:. 4
C. missing page number: 10
D. Page number missing: 5
6, the following program, int32-t represents a 32-bit signed integer, the inlet is the main function of the program, the final result Q res is the number?
.- A (231 + 230 + ... + + 2 ^ 22 is + 21 is 0)
radical B.O
C.-. 1
D. program infinite loop
7. Given a graph as shown below, edges in the graph represents the distance between two nodes. If node 1 Dijkstra shortest path node 8 and, upon completion of the calculation, the calculated shortest path node 8 to node 1 is? When the calculation is completed at the same time a shortest path node to node 8, the node to which node 1 (except 1 and 8) of the shortest path has been calculated? ()
8, x86 see the CPU in real mode code is interpreted as an address 2330H: 5041H, does it ultimately looking for an address in memory is how much?
A.28341H
B.5374H
C.52740H
D.7371H
9, there are three programs J1, J2, J3. In a single-core CPU program execution, the program requires three resources as follows:
high-priority program may preempt lower priority CPU programs, but not preempt IO. Q. When all tasks executed, total consumption is the time?
A.170ｍｓ
B.160ｍｓ
C.120ｍｓ
D.130ｍｓ
The answer for reference only.
1, Answer Analysis: correct answer: B
(1) A + B of the hexadecimal notation: OxFFFFFFFFFFFFFFF (16 bit F.), Is converted to binary 111 ...... 111 (64 1, each F-> 4 bit 2).
(2) a signed number: is for the binary terms. With the most significant bit as the sign bit, "0" represents "+", "1" represents "-." Therefore, a + b is a negative result.
(3) stored in the form of a computer as a complement of a negative number, the complement to convert the original code is calculated as follows:
. ① For positive numbers, the same as the original code and complement.
②. For negative numbers, in addition to the complement sign bit, bitwise, end plus 1, i.e., to obtain the original code.
(4) a + b = 111 ...... 111 (64 bit 1)
Invert: 100 ...... 000 (a 1 followed by 0 63)
plus one:
10 hex: -1.
2. Answer Analysis: Correct answer: B
3. Answer Analysis: The correct answer: C
note stack size is 3
4. Answer Analysis: The correct answer: D
5. Answer Analysis: The correct answer: C
memory 5, so the first five pages were missing, because the memory space and not five, then replaced with 1,1 6 2 replacement, and 4.3.6 are not replaced , 7 substitution 5,8 4,3 With the replacement, then 9 replacement 3, a total of ten times.
6. Answer Analysis: correct answer: D
In char Example
F (1,0):
A = B 2 -1 =
A = B = -2. 3
...
A = 127 B = -126
A = B = 128 -127 overflow -> a = b -127 char range = -128: -128 ~ 127
return A + B: -128-127 actually 1 (char range), the cycle continues
And the original embodiment of int_32t, borderline case a + b: -232 + (- 232 + 1) = 1, the cycle continues.
Therefore infinite loop.
7, Answer Analysis: correct answer: C
Initial state: Path Length 0: (1)
the path length 1: (1,5)
Path Length 2: (1,3)
path length 3: (1,3,4), ( 2)
the path length 4: (1,5,8)
shortest path length for the node 1-8 4; 2,3,4,5 shortest path nodes have been calculated; wherein the shortest path to a minimum of 5 node 1;
Should choose C, people feel the problem yourself playing word games to go around
8, Answer Analysis: Correct Answer: A
memory access in real mode
registers 8086 processor (CPU) is 16 bits, the address provided on an address line by the CPU. Synthesis of a 20-bit CPU with 16-bit values of two values: the value of a 16-bit by 16 (equivalent to the 16-bit value is stored in the lower 16 bits of the register 20, and the lower 16 bits to the high shifted 4 bits) plus another 16-bit value. This is provided by two 16-bit values to the synthesis of 20 as an address value of the address lines of the memory access. 16 is multiplied by that segment base value is called, no value is multiplied by 16 is referred to as the offset address.
CPU in real mode, the segment register value is the segment base, if you want to access a memory location by the assembler, then we need to specify a segment register and an offset address to or "segment base value: offset format address value ". Value is multiplied by the CPU 16 will then segment registers and offset address addition after only this result to the address line; form given segment base address and the offset of expression, will give CPU section yl after the address is multiplied by 16 and adding the offset address, this will only result to the address line.
Figure 2. real mode memory access (stars memory address)
that is, in the assembler, the starting segment base: offset address of the memory access, memory address because the embodiment is formed of a CPU "segment base address * 16 + offset address. "
By: Access Memory "segment offset" approach is a way to manage CPU memory
9. Answer Analysis: The correct answer: D
because of the high priority program can preempt CPU low priority programs, but can not seize IO,
so J1 not seize J2 of the IO after the CPU, J2 after the IO can seize J3 of CPU .
CPU：J1 40ms + J3 10ms + J2 20ms +J1 20ms
IO：J2 50ms + J1 60ms + J3 20ms
Therefore, consuming a total time of 130ms, the election D.