The computer system basis (a): representation of the program, and the conversion link (the sixth week of the quiz)

1. a C language program in the array variable b declared as "int b [10] [5];", there is a for statement as follows:

    for (i=0; i<10, i++)
        for (j=0; j<5; j++)
            sum+= b[i][j];

Assumed to be performed to "+ = b [i] sum [j];", the value of sum in EAX, b [i] [0] address is located in the EDX is, j in ESI, then the "sum + = b [i ] [j]; "command (AT & T format) may be the corresponding ().

     A.addl 0(%esi, %edx, 2), %eax
     B.addl 0(%esi, %edx, 4), %eax
     C.addl 0(%edx, %esi, 2), %eax
     D.addl 0(%edx, %esi, 4), %eax

2.IA-32 instruction "popl% ebp" function is ().

     A.R[esp]←R[esp]-4，R[ebp]←M[R[esp]]
     B.R[ebp]←M[R[esp]]，R[esp]←R[esp]+4
     C.R[esp]←R[esp]+4，R[ebp]←M[R[esp]]
     D.R[ebp]←M[R[esp]]，R[esp]←R[esp]-4

3.IA-32 instruction "movl 8 (% edx,% esi, 4),% edx" function is ().

     AM [R [edx] + R [from] * 4 + 8] ← R [edx]
     BM [R [] + R [edx] * 4 + 8] ← R [edx]
     C [edx] ← M [R [edx] + R [esi] * 4 + 8]
     DIR [edx] ← M [R [esi] + R [edx] * 4 + 8]

4. disposed signext [x] represents a sign extension of x, ZeroExt [x] denotes the x-zero-extended. IA-32 instruction "movswl% cx, -20 (% ebp)" is a function ().

     A.M[R[ebp]-20]←SignExt[R[cx]]
     B.R[cx]←SignExt [M[R[ebp]-20]]
     C.M[R[ebp]-20]←ZeroExt[R[cx]]
     D.R[cx]←ZeroExt [M[R[ebp]-20]]

5. Suppose R [ax] = FFE8H, R [bx] = 7FE6H, the execution instruction "subw% bx,% ax", and changes the contents of the flags register is set ().

     A.R[ax]=8002H，OF=0，SF=1，CF=0，ZF=0
     B.R[bx]=8002H，OF=0，SF=1，CF=0，ZF=0
     C.R[ax]=8002H，OF=1，SF=1，CF=0，ZF=0
     D.R[bx]=8002H，OF=1，SF=1，CF=0，ZF=0

6. Suppose R [eax] = 0000B160H, R [ebx] = 00FF0110H, the execution instruction "imulw% bx", the contents of general register changes ().

     A.R[eax]=00007600H，R[dx]=00BCH
     BR [eax] = FFAC7600H, remaining unchanged
     CR [eax] = 00BC7600, remaining unchanged
     D.R[eax]=00007600H，R[dx]=FFACH

7. Suppose short variable x are allocated in register AX, if R [ax] = FF70H, executes the command "salw $ 2,% ax", a machine number and the variable x are true value ().

     A.FDC3H，-573
     B.FDC0H，-576
     C.FFDCH，-36
     D.3FDC，16348

8. The program P in two variables i and j, are respectively assigned register EAX and EDX, P is the statement "if (i <j) { ...}" corresponds to the following sequence of instructions (instruction address is on the left, the middle machine code, the right to assembly instructions):
804846a 39% C2 cmpl EAX, EDX%
804846c 7E 0D jle XXXXXXXX
If the execution instruction 804846a cmpl at, i = 105, j = 100 , after the instruction execution to jle () at the instruction execution.

     A.804847b
     B.804846e
     C.8048461
     D.8048479

9. The following statements about x87 FPU instruction in the floating-point processing, the error is ().

     A.float double-data and main memory may have a floating-point register is loaded from the rounding occurs, resulting in loss of precision
     B. 80 provides eight floating-point registers ST (0) ~ ST (7), using the stack structure, to stack ST (0)
     C.float, double, and three types of long double-bit format with 80 data stored in the floating-point register
     When D.float, double, and long double type data into main memory, accounting for 32, 64 and 96

10. The following statements about MMX / SSE instruction set, the error is ().

     A.MMX / SSE instruction set and IA-32 instruction set share the same set of general purpose registers
     B. same microprocessor supports IA-32 instruction set MMX / SSE instruction set
     C.SSE use instruction is a SIMD (Single Instruction Multiple Data) instruction level parallelism Technical Data
     D. 128 currently supports SSE integer arithmetic processing in parallel or simultaneously with two 64-bit double precision floating point