Driving environment configuration instructions TDM + SSI
Version ：0.1
Brief introduction
Lantiq to the UGW6.1.1 the environment does not support TDM (default is PCM) applications, this document is a detailed description add support for PCM part of UGW6.1.1. Add support of SSI.
A: SSI
Attached is the new tapi, vmmc, tapidemo driver
Please file all customers will be put UGW the DL folder
There are two ways to replace the driver
Method 1. Specify driver version to be used in the menuconfig
but the driver:
Lantiq --->
--- LTQ-voice-but .......................................... .. BUT subsystem --->
--- LTQ-voice-but .......................................... .. BUT subsystem
overwrite package version --->
[*] Use custom package version
(4.15.3.3) version as string (default version: 4.10.7.5) (NEW)
KPI2UDP
--- ltq-voice-kpi2udp................................... TAPI KPI2UDP plug-in --->
overwrite package version --->
[* ] Use custom package version
(3.0.5.1) version as string (default version: 3.0.5.1) (NEW)
TAPIDEMO
<* > ltq-voice-tapidemo.................................. TAPIdemo application --->
overwrite package version --->
[*] Use custom package version
(5.8.0.0) version as string (default version: 5.1.1.64) (NEW)
VMMC
--- ltq-voice-vmmc............................ TAPI LL driver for Voice Macro --->
overwrite package version --->
[*] Use custom package version
(1.19.0.1) version as string (default version: 1.15.1.6) (NEW)
VMMC FW
--- ltq-voice-vmmc-xrx200-firmware..................... XRX200 voice firmware --->
[*] Use custom package version
(3.5.0.7.0) fw_voip_vr9 version as string (default version: 3.4.0.7.0)
As custom source directory I have used the default value , because there may be to the wrong place and did not replace the driver
Method 2. Modify the package-> feeds-> ltq_voice_cpe bottom
ltq-voice-kpi2udp
ltq-voice-tapi
ltq-voice-tapidemo
ltq-voice-vmmc
ltq-voice-vmmc-xrx200-firmware
These folders makfie, will pkg_version: = behind the figures to the new version 4.10.7.5
With examples of customer, I recommend comparing the first reform law
Two TDM
- Adding TDM device tree
ubuntu@sky:~/work/Lantiq/Test_Damai_GRX288/UGW-6.1.1/target/linux/lantiq/image/dts$ vi EASY4210.dtsi
TDM will be registered to the kernel, the kernel detect whether TDM.
FIG code adding portion is:
94 tdm {
95 lantiq,groups = "tdm";
96 lantiq,function = "tdm";
97 };
- pinctrl drive configuration according to the register TDM
注释：根据硬件情况，把不要的GPIO功能表的TDM注销为NONE，把需要的GPIO功能标的NONE改成TDM
1）屏蔽了TDM的使用
将以下
改为
- 正确的添加demo板和大麦盒子板子的TDM的GPIO的管脚、
GPIO 0和GPIO 25的TDM已经正确配置
将以下
改为
- 添加TDM管脚组（程序中定义与其他的脚地mutex）
344 static const unsigned pins_tdm[] = {GPIO0, GPIO25, GPIO40, GPIO41};
- 添加管脚组互斥信息
GRP_MUX("tdm", TDM , pins_tdm),
- 添加常量管脚组信息
568 static const char * const xway_tdm_grps[] = {"tdm"};
- 添加pinmux tdm功能
681 {"tdm", ARRAY_AND_SIZE(xway_tdm_grps)},
将以上的TDM的程序添加进去，pinctr-xway.c每个函数、数组或者结构体的入口在pinctrl-xway.c与gpio目录下的相应的程序去对应。
附 加
倘若CPU升级，从GRX288升级为XRX300的CPU，则需要添加以下代码，作为参考，需要根据datasheet的寄存器等配置：
93 enum xway_mux {
112 XWAY_MUX_SDIO,
113 XWAY_MUX_GPHY,
114 XWAY_MUX_WLAN,
115 XWAY_MUX_MCD,
116 XWAY_MUX_SSI0,
117 XWAY_MUX_LED,
118 XWAY_MUX_DSP,
119 XWAY_MUX_ARC,
120 XWAY_MUX_NONE = 0xffff,
121 };
-----------------------------------------------------------------
190 static const struct ltq_mfp_pin xrx3xx_mfp[] = {
191 /* pin f0 f1 f2 f3 */
192 MFP_XWAY(GPIO0, GPIO, EXIN, EPHY, NONE),
193 MFP_XWAY(GPIO1, GPIO, NONE, EXIN, NONE),
194 MFP_XWAY(GPIO2, NONE, NONE, NONE, NONE),
195 MFP_XWAY(GPIO3, GPIO, CGU, NONE, NONE),
196 MFP_XWAY(GPIO4, GPIO, STP, DSP, NONE),
197 MFP_XWAY(GPIO5, GPIO, STP, EPHY, NONE),
198 MFP_XWAY(GPIO6, GPIO, STP, NONE, ARC),
199 MFP_XWAY(GPIO7, NONE, NONE, NONE, NONE),
200 MFP_XWAY(GPIO8, GPIO, CGU, GPHY, EPHY),
201 MFP_XWAY(GPIO9, GPIO, WLAN, NONE, EXIN),
202 MFP_XWAY(GPIO10, GPIO, USIF, SPI, EXIN),
203 MFP_XWAY(GPIO11, GPIO, USIF, WLAN, SPI),
204 MFP_XWAY(GPIO12, NONE, NONE, NONE, NONE),
205 MFP_XWAY(GPIO13, GPIO, EBU, NONE, NONE),
206 MFP_XWAY(GPIO14, GPIO, CGU, USIF, EPHY),
207 MFP_XWAY(GPIO15, GPIO, SPI, NONE, MCD),
208 MFP_XWAY(GPIO16, GPIO, SPI, EXIN, NONE),
209 MFP_XWAY(GPIO17, GPIO, SPI, NONE, NONE),
210 MFP_XWAY(GPIO18, GPIO, SPI, NONE, NONE),
211 MFP_XWAY(GPIO19, GPIO, USIF, NONE, EPHY),
212 MFP_XWAY(GPIO20, NONE, NONE, NONE, NONE),
213 MFP_XWAY(GPIO21, NONE, NONE, NONE, NONE),
214 MFP_XWAY(GPIO22, NONE, NONE, NONE, NONE),
215 MFP_XWAY(GPIO23, GPIO, EBU, NONE, NONE),
216 MFP_XWAY(GPIO24, GPIO, EBU, NONE, NONE),
217 MFP_XWAY(GPIO25, GPIO, TDM, NONE, NONE),
218 MFP_XWAY(GPIO26, GPIO, NONE, TDM, NONE),
219 MFP_XWAY(GPIO27, GPIO, TDM, NONE, NONE),
220 MFP_XWAY(GPIO28, NONE, NONE, NONE, NONE),
221 MFP_XWAY(GPIO29, NONE, NONE, NONE, NONE),
222 MFP_XWAY(GPIO30, NONE, NONE, NONE, NONE),
223 MFP_XWAY(GPIO31, NONE, NONE, NONE, NONE),
224 MFP_XWAY(GPIO32, NONE, NONE, NONE, NONE),
225 MFP_XWAY(GPIO33, NONE, NONE, NONE, NONE),
226 MFP_XWAY(GPIO34, GPIO, NONE, SSI0, NONE),
227 MFP_XWAY(GPIO35, GPIO, NONE, SSI0, NONE),
228 MFP_XWAY(GPIO36, GPIO, NONE, SSI0, NONE),
229 MFP_XWAY(GPIO37, NONE, NONE, NONE, NONE),
230 MFP_XWAY(GPIO38, NONE, NONE, NONE, NONE),
231 MFP_XWAY(GPIO39, NONE, NONE, NONE, NONE),
232 MFP_XWAY(GPIO40, NONE, NONE, NONE, NONE),
233 MFP_XWAY(GPIO41, NONE, NONE, NONE, NONE),
234 MFP_XWAY(GPIO42, GPIO, MDIO, NONE, NONE),
235 MFP_XWAY(GPIO43, GPIO, MDIO, NONE, NONE),
236 MFP_XWAY(GPIO44, NONE, NONE, NONE, NONE),
237 MFP_XWAY(GPIO45, NONE, NONE, NONE, NONE),
238 MFP_XWAY(GPIO46, NONE, NONE, NONE, NONE),
239 MFP_XWAY(GPIO47, NONE, NONE, NONE, NONE),
240 MFP_XWAY(GPIO48, GPIO, EBU, NONE, NONE),
241 MFP_XWAY(GPIO49, GPIO, EBU, NONE, NONE),
242 MFP_XWAY(GPIO50, GPIO, EBU, NONE, NONE),
243 MFP_XWAY(GPIO51, GPIO, EBU, NONE, NONE),
244 MFP_XWAY(GPIO52, GPIO, EBU, NONE, NONE),
245 MFP_XWAY(GPIO53, GPIO, EBU, NONE, NONE),
246 MFP_XWAY(GPIO54, GPIO, EBU, NONE, NONE),
247 MFP_XWAY(GPIO55, GPIO, EBU, NONE, NONE),
248 MFP_XWAY(GPIO56, GPIO, EBU, NONE, NONE),
249 MFP_XWAY(GPIO57, GPIO, EBU, NONE, NONE),
250 MFP_XWAY(GPIO58, GPIO, EBU, TDM, NONE),
251 MFP_XWAY(GPIO59, GPIO, EBU, NONE, NONE),
252 MFP_XWAY(GPIO60, GPIO, EBU, NONE, NONE),
253 MFP_XWAY(GPIO61, GPIO, EBU, NONE, NONE),
254
293 static const unsigned xrx3xx_pins_stp[] = {GPIO4, GPIO5, GPIO6};
294 static const unsigned xrx3xx_pins_mdio[] = {GPIO42, GPIO43};
295 static const unsigned xrx3xx_pins_nand_ale[] = {GPIO13};
296 static const unsigned xrx3xx_pins_nand_cs1[] = {GPIO23};
297 static const unsigned xrx3xx_pins_nand_cle[] = {GPIO24};
298 static const unsigned xrx3xx_pins_nand_rdy[] = {GPIO48};
299 static const unsigned xrx3xx_pins_nand_rd[] = {GPIO49};
300 static const unsigned xrx3xx_pins_nand_d1[] = {GPIO50};
301 static const unsigned xrx3xx_pins_nand_d0[] = {GPIO51};
302 static const unsigned xrx3xx_pins_nand_d2p1[] = {GPIO52};
303 static const unsigned xrx3xx_pins_nand_d2p2[] = {GPIO53};
304 static const unsigned xrx3xx_pins_nand_d6 [] = {GPIO54};
305 static const unsigned xrx3xx_pins_nand_d5p1 [] = {GPIO55};
306 static const unsigned xrx3xx_pins_nand_d5p2 [] = {GPIO56};
307 static const unsigned xrx3xx_pins_nand_d3 [] = {GPIO57};
308 static const unsigned xrx3xx_pins_nand_cs0 [] = {GPIO58};
309 static const unsigned xrx3xx_pins_nand_wr [] = {GPIO59};
310 static const unsigned xrx3xx_pins_nand_wp [] = {GPIO60};
311 static const unsigned xrx3xx_pins_nand_se [] = {GPIO61};
312
313 static const unsigned xrx3xx_pins_exin0[] = {GPIO0};
314 static const unsigned xrx3xx_pins_exin1[] = {GPIO1};
315 static const unsigned xrx3xx_pins_exin2[] = {GPIO16};
316 static const unsigned xrx3xx_pins_exin4[] = {GPIO10};
317 static const unsigned xrx3xx_pins_exin5[] = {GPIO9};
318
319 static const unsigned xrx3xx_pins_spi[] = {GPIO16, GPIO17, GPIO18};
320 static const unsigned xrx3xx_pins_spi_cs1[] = {GPIO15};
321 static const unsigned xrx3xx_pins_spi_cs4[] = {GPIO10};
322 static const unsigned xrx3xx_pins_spi_cs6[] = {GPIO11};
323
324 static const unsigned xrx3xx_pins_usif[] = {GPIO10, GPIO11, GPIO14, GPIO19};
325
326 static const unsigned xrx3xx_pins_clkout0[] = {GPIO3};
327 static const unsigned xrx3xx_pins_clkout1[] = {GPIO8};
328 static const unsigned xrx3xx_pins_clkout2[] = {GPIO14};
329
330 static const unsigned xrx3xx_pins_ephy_ready[] = {GPIO0};
331 static const unsigned xrx3xx_pins_ephy0_led0[] = {GPIO5};
332 static const unsigned xrx3xx_pins_ephy0_led1[] = {GPIO8};
333 static const unsigned xrx3xx_pins_ephy1_led0[] = {GPIO14};
334 static const unsigned xrx3xx_pins_ephy1_led1[] = {GPIO19};
335
336 static const unsigned xrx3xx_pins_gphy[] = {GPIO8};
337 static const unsigned xrx3xx_pins_wlan[] = {GPIO9, GPIO11};
338 static const unsigned xrx3xx_pins_mcd[] = {GPIO15};
339 static const unsigned xrx3xx_pins_tdm[] = {GPIO25, GPIO26, GPIO27, GPIO58};
340 static const unsigned xrx3xx_pins_ssi0[] = {GPIO34, GPIO35, GPIO36};
341 static const unsigned xrx3xx_pins_dsp[] = {GPIO4};
342 static const unsigned xrx3xx_pins_arc[] = {GPIO5};
static const struct ltq_pin_group xrx3xx_grps[] = {
GRP_MUX("exin0", EXIN, xrx3xx_pins_exin0),
GRP_MUX("exin1", EXIN, xrx3xx_pins_exin1),
GRP_MUX("exin2", EXIN, xrx3xx_pins_exin2),
GRP_MUX("exin4", EXIN, xrx3xx_pins_exin4),
GRP_MUX("exin5", EXIN, xrx3xx_pins_exin5),
GRP_MUX("stp", STP, xrx3xx_pins_stp),
GRP_MUX("mdio", MDIO, xrx3xx_pins_mdio),
GRP_MUX("nand ale", EBU, xrx3xx_pins_nand_ale),
GRP_MUX("nand cs1", EBU, xrx3xx_pins_nand_cs1),
GRP_MUX("nand cle", EBU, xrx3xx_pins_nand_cle),
GRP_MUX("nand rdy", EBU, xrx3xx_pins_nand_rdy),
GRP_MUX("nand d1", EBU, xrx3xx_pins_nand_d1),
GRP_MUX("nand d0", EBU, xrx3xx_pins_nand_d0),
GRP_MUX("nand d2p1", EBU, xrx3xx_pins_nand_d2p1),
GRP_MUX("nand d2p2", EBU, xrx3xx_pins_nand_d2p2),
GRP_MUX("nand d6", EBU, xrx3xx_pins_nand_d6),
GRP_MUX("nand d5p1", EBU, xrx3xx_pins_nand_d5p1),
GRP_MUX("nand d5p2", EBU, xrx3xx_pins_nand_d5p2),
GRP_MUX("nand d3", EBU, xrx3xx_pins_nand_d3),
GRP_MUX("nand cs0", EBU, xrx3xx_pins_nand_cs0),
GRP_MUX("nand wr", EBU, xrx3xx_pins_nand_wr),
GRP_MUX("nand wp", EBU, xrx3xx_pins_nand_wp),
GRP_MUX("nand rd", EBU, xrx3xx_pins_nand_rd),
GRP_MUX("nand se", EBU, xrx3xx_pins_nand_se),
GRP_MUX("spi", SPI, xrx3xx_pins_spi),
GRP_MUX("spi_cs1", SPI, xrx3xx_pins_spi_cs1),
GRP_MUX("spi_cs4", SPI, xrx3xx_pins_spi_cs4),
GRP_MUX("spi_cs6", SPI, xrx3xx_pins_spi_cs6),
GRP_MUX("usif", USIF, xrx3xx_pins_usif),
GRP_MUX("clkout0", CGU, xrx3xx_pins_clkout0),
GRP_MUX("clkout1", CGU, xrx3xx_pins_clkout1),
GRP_MUX("clkout2", CGU, xrx3xx_pins_clkout2),
GRP_MUX("ephy_ready", EPHY, xrx3xx_pins_ephy_ready),
GRP_MUX("ephy0_led0", EPHY, xrx3xx_pins_ephy0_led0),
GRP_MUX("ephy0_led1", EPHY, xrx3xx_pins_ephy0_led1),
GRP_MUX("ephy1_led0", EPHY, xrx3xx_pins_ephy1_led0),
GRP_MUX("ephy1_led1", EPHY, xrx3xx_pins_ephy1_led1),
GRP_MUX("gphy", GPHY, xrx3xx_pins_gphy),
GRP_MUX("wlan", WLAN, xrx3xx_pins_wlan),
GRP_MUX("mcd", MCD, xrx3xx_pins_mcd),
GRP_MUX("tdm", TDM, xrx3xx_pins_tdm),
GRP_MUX("ssi0", SSI0, xrx3xx_pins_ssi0),
GRP_MUX("dsp", SSI0, xrx3xx_pins_dsp),
GRP_MUX("arc", SSI0, xrx3xx_pins_arc),
};
static const char * const xrx3xx_spi_grps[] = {"spi", "spi_cs1",
"spi_cs4",
"spi_cs6"};
static const char * const xrx3xx_usif_grps[] = {"usif"};
static const char * const xrx3xx_cgu_grps[] = {"clkout0", "clkout1",
"clkout2"};
static const char * const xrx3xx_exin_grps[] = {"exin0", "exin1", "exin2",
"exin4", "exin5"};
static const char * const xrx3xx_stp_grps[] = {"stp"};
static const char * const xrx3xx_mdio_grps[] = {"mdio"};
static const char * const xrx3xx_ebu_grps[] = {
"nand ale", "nand cs1",
"nand cle", "nand rdy",
"nand rd", "nand d1",
"nand d0", "nand d2p1",
"nand d2p2", "nand d6",
"nand d5p1", "nand d5p2",
"nand d3", "nand cs0",
"nand wr", "nand wp",
"nand se"};
static const char * const xrx3xx_ephy_grps[] = {"ephy_ready",
"ephy0_led0", "ephy0_led1",
"ephy1_led0", "ephy1_led1"};
static const char * const xrx3xx_gphy_grps[] = {"gphy"};
static const char * const xrx3xx_wlan_grps[] = {"wlan"};
static const char * const xrx3xx_mcd_grps[] = {"mcd"};
static const char * const xrx3xx_tdm_grps[] = {"tdm"};
static const char * const xrx3xx_ssi0_grps[] = {"ssi0"};
static const char * const xrx3xx_dsp_grps[] = {"dsp"};
static const char * const xrx3xx_arc_grps[] = {"arc"};
static const struct ltq_pmx_func xrx3xx_funcs[] = {
{"spi", ARRAY_AND_SIZE(xrx3xx_spi_grps)},
{"usif", ARRAY_AND_SIZE(xrx3xx_usif_grps)},
{"cgu", ARRAY_AND_SIZE(xrx3xx_cgu_grps)},
{"exin", ARRAY_AND_SIZE(xrx3xx_exin_grps)},
{"ebu", ARRAY_AND_SIZE(xrx3xx_ebu_grps)},
{"mdio", ARRAY_AND_SIZE(xrx3xx_mdio_grps)},
{"stp", ARRAY_AND_SIZE(xrx3xx_stp_grps)},
{"ephy", ARRAY_AND_SIZE(xrx3xx_ephy_grps)},
{"gphy", ARRAY_AND_SIZE(xrx3xx_gphy_grps)},
{"wlan", ARRAY_AND_SIZE(xrx3xx_wlan_grps)},
{"mcd", ARRAY_AND_SIZE(xrx3xx_mcd_grps)},
{"tdm", ARRAY_AND_SIZE(xrx3xx_tdm_grps)},
{"ssi0", ARRAY_AND_SIZE(xrx3xx_ssi0_grps)},
{"dsp", ARRAY_AND_SIZE(xrx3xx_dsp_grps)},
{"arc", ARRAY_AND_SIZE(xrx3xx_arc_grps)},
};
} soc_cfg[] = {
{XRX3XX_MAX_PIN, xrx3xx_mfp,
xrx3xx_grps, ARRAY_SIZE(xrx3xx_grps),
xrx3xx_funcs, ARRAY_SIZE(xrx3xx_funcs),
xrx3xx_exin_pins_map, 5},
};