table of Contents
1. FPGA download file Introduction
2. FPGA download file compare features
3. The method of programming the downloaded file
1. FPGA download file Introduction
FPGA Common download file format sof, pof, jic and elf, commonly referred to .sof documents and files .pof FPGA "hardware" or "firmware" file.
sof configuration data to the FPGA internal SRAM, through JTAG download, download FPGA hardware implemented functions, power-down after volatilization.
Flash pof data to configure a device, download the configuration mode to the AS by the device, FPGA configuration data is automatically read out from the configuration device upon restart after power off, and then the SRAM disposed inside the FPGA, the FPGA hardware implemented functions. If the design contains NIOS, NIOS POF contains only hardware, the configuration after power is present within the FPGA NIOS, NIOS set based on a preset Memory space fetch operation. Further, the file can be converted into jic POF file downloaded into the EPCS through JTAG mode, the hardware design can be eliminated and therefore an interface AS.
JIC file indirect JTAG profile (JTAG Indirect Configuration File), using the File menu QuartusII the Convert Programming File command file conversion .sof generated, and then using the Tools menu QuartusII downloaded into the FLASH Programmer command (note: download the file to JIC FLASH after re-power must be turned off!)
elf NIOS software is designed to generate the Nios II IDE to compile the source files for the C language. Operation may be loaded into NIOS by JTAG RAM, can be loaded (via the NIOS Flash Programmer) to the configuration device (located after pof configuration data), if the NIOS reset vector epcs_controller, after NIOS power will be from a configuration by epcs_controller taking a first instruction executed within the device. If you specify NIOS reset vector to SDRAM and SDRAM is empty, NIOS will run fly away.
2. FPGA download file compare features
| download file |
Generation tool |
How to download |
Download Memory |
Loss of power loss |
| .sof |
Quartus II compiler generated |
JTAG |
FPGA（SRAM） |
Lose |
| .pof |
Quartus II compiler generated |
AS (Active Slave) |
FLASH（EPCS16） |
Is not lost |
| .jic |
Quartus II “File / Convert Programming File” |
JTAG |
FLASH（EPCS16） |
Is not lost |
| .elf |
Nios II IDE |
JTAG (debug mode) |
FPGA（SRAM） |
Lose |
| .elf |
Nios II IDE |
JTAG (programming mode) |
FLASH（EPCS16） |
Is not lost |
3. The method of programming the downloaded file
（1）sof
Programmer for use in programming the JTAG interface need to check Program / Configure during programming.
（2）pof
Programmer for use in AS programming interface need to check Program / Configure and Verify during programming.
(3) JIC
Programmer for use in programming the JTAG interface need to check Program / Configure and Verify during programming.
（4）elf
For more details, see:
Nios II curing process (how to download elf file) - Kuala children unsweetened blog - CSDN blog
https://blog.csdn.net/snaking616/article/details/83064887
4. Reference
[1] NIOS in sof, pof and elf relationship - DanielLee_ustb column - CSDN blog
https://blog.csdn.net/daniellee_ustb/article/details/8539249
[2] JTAG download method Altera FPGA NiosII kernel with summary - Baidu library
https://wenku.baidu.com/view/5fd49863f18583d048645950.html
[3] combined with the format conversion FPGA development sof and elf files - not sweet melon child's blog - CSDN blog
https://blog.csdn.net/snaking616/article/details/83049985
[4] using the Nios II 10.0sp1 Command Shell [gcc3] merger sof and elf file - Commissioning record - not sweet melon child's blog - CSDN blog
https://blog.csdn.net/snaking616/article/details/83022956
[5] Nios II curing process (how to download elf file) - Kuala children unsweetened blog - CSDN blog
https://blog.csdn.net/snaking616/article/details/83064887