Power-trigger time anomaly

Usually we have a cpu after power is wondering how to implement the program, the following is a basic explanation:

When the power is first read from the word bootrom configuration, the detection and configuration hardware configuration to the system time clock are combined, after the CPU PLL locking period is completed, issued HRESET / SRESET, this time the system will generate an abort resulting cpu execution program (such as the 0x100 at mpc) at the address specified by the exception vector.

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Origin blog.csdn.net/xiebingsuccess/article/details/91877026