SCM: external chip learning (a)

1,38 decoder -D74HC138

D74HC138D is a three-channel input, eight output channels of the decoder.

Features:

• COMS technology adoption
• Low power consumption
• Operating voltage: 3.0V - 5.0V
• Package: SOP16

Understand the contents of the above, then read circuit diagrams:

1, A0, A1, A2 as a three-input three-pin
2, non (Y0, Y1, Y2, Y3 , Y4, Y5, Y6, Y7) 8 pins as outputs 8
3, there are three pins (E1 non, non-E2, E3), and three gates, only when a value of (0,0,1) causes the output is 1, then G1 VCC FIG 1, the non-G2A, G2B contactless the GND, so three aND gates output is 1, then the output of the decoder 38 is valid
4, a truth table is programmed to look

program

This programming: Dynamic digital sequence from left to right from 0 to 7, the decoder 138 is introduced to reduce the use of the microcontroller I / O port

#include <reg51.h>
typedef unsigned char u8;
typedef unsigned int  u16;

#define led P1		//显示段选值
sbit A38=P3^0;		//74HC138译码器
sbit B38=P3^1;
sbit C38=P3^2;

u8 segment[]={0xc0,0xf9,0xa4,0xb0,0x99,0x92,//0-5
0x82,0xf8,0x80,0x90,0x88,//6-A
0x83,0xc6,0xa1,0x86,0x8e};//B-F

void delay(u16 i)
{
	while(i--);
}

void change()
{
	u8 i;
	for(i=0;i<8;i++)
	{
		switch(i)
		{
			case 0:A38=0;B38=0;C38=0;break;
			case 1:A38=1;B38=0;C38=0;break;	
			case 2:A38=0;B38=1;C38=0;break;	
			case 3:A38=1;B38=1;C38=0;break;
			case 4:A38=0;B38=0;C38=1;break;
			case 5:A38=1;B38=0;C38=1;break;	
			case 6:A38=0;B38=1;C38=1;break;	
			case 7:A38=1;B38=1;C38=1;break;
		}
		led=~segment[i];
		delay(100);
	}
}


void main()
{
	while(1)
	{
		change();
	}
}

2, dual P-channel enhancement-type MOS transistor -D74HC245

D74HC245 is a tri-state output, eight signal transceiver, mainly used in large-screen display, to enhance the drive.

main feature:

• Using CMOS technology
• Wide voltage range: 3.0V - 5.0V
• Bi-directional tri-state output
• Eight-wire bidirectional transceiver
• Package: SOP20, SOP20-2, TSSOP20, DIP20

1, a total of 20 pins, (A0 - A8) (B0 - B8) two 8-bit input to output
2, VCC, GND pin: Current
3, OE non-: chip enable (working start condition)
. 4, the DIR : O direction

in FIG OE contactless GND line, so the pin trigger may be controlled in accordance with the truth table of two sets of 8 input or output pin of the
action of the chip it is to increase the driving ability of the circuit

3,74HC165 (parallel and serial)

8-bit shift register (parallel input, serial output complementary)

1, CLK, CLK INH :( clock input rising edge)
2, A - Parallel data input :( H)
. 3, the SER :( serial data input terminal)
. 4, the output terminal :( Qh), non-Qh :( complementary output terminal)
. 5, SH / non :( shift control the LD / placement control)

When the shift / into a control terminal (SH / LD non) is low, the parallel data (A-H) is the register, and the clock (CLK, CLK INH) and serial data (the SER) are independent. When the SH / LD non-high, set the number of parallel functions are disabled.
INK CLK and CLK are functionally equivalent, it may be used interchangeably. When CLK is low and there is a CLKINK and SH / LD non-high, the clock may be input to another. When CLK and CLK INK has a high level, the other clock is disabled. CLK is at a high level only available INK CLK becomes a high level.

Programmed

Program features: keys to control the LED light off, 74HC165 chip keys by the parallel data into serial data input to the internal microcontroller, then the LED control through the data

#include <reg51.h>
#include "intrins.h"
typedef unsigned char u8;
typedef unsigned int  u16;

sbit IN_PL = P1^6;  	//移位、置位控制
sbit IN_DATA = P1^7;	//数据输出端
sbit SCK = P3^6;			//时钟
#define led P0

void delay(u16 i)
{
	while(i--);
}

u8 HC165INIT()
{
	u8 indata,i;
	//SH_LD引脚置为0，置位功能
	IN_PL = 0;
	_nop_();
	IN_PL = 1;
	_nop_();
	
	//取数据
	indata = 0;
	for(i=0;i<8;i++)
	{
		indata=indata<<1;
		SCK = 0;
		_nop_();
		indata|=IN_DATA;
		SCK = 1;
	}
	return indata;
}

void main()
{
	u8 key;
	led=0x00;
	while(1)
	{
		key = HC165INIT();
		if(key!=0xff)
		{
			led=~key;
		}
	}
}

4,74HC595 (serial converter)

The basic description

1,8 serial input bit, 8-bit serial or parallel output shift register
2, a silicon CMOS device structure, a low voltage compatible with TTL circuits, compliance with JEDEC standard
3, with an 8-bit shift register and a memory, tristate output
4, the shift register and memory are separate clock

Pin Description:

Data terminal:
the QA - QH: parallel outputs
QH ': serial output
SER: serial data input terminal

Control terminal:
/ SCLR: low data shift register is cleared, then typically VCC (reset)
the SCK: the rising edge of the data shift register data (QA-> QH), the falling edge of the shift register are unchanged
RCK: the rising edge of the shift register data into the data storage register, the falling edge storage register are unchanged
/ G: disable output (high impedance state) at a high level

When / SCLR is high, / G is low, the rising edge of SCK data into the shift register, the output to the parallel port on the rising edge RCK.

code

Program features: serial output 8-bit data conversion at 595, 8-bit data parallel output for controlling the LED light water

#include <reg51.h>
#include "intrins.h"

typedef unsigned char u8;
typedef unsigned int  u16;

sbit SRCLK = P3^6;
sbit RCLK = P3^5;
sbit SER = P3^4;


void delay(u16 i)
{
	while(i--);
}

void HC595(u8 dat)
{
	u8 i;
	SRCLK = 1;
	RCLK  = 1;
	for(i=0;i<8;i++)
	{
		SER=dat>>7;
		dat=dat<<1;
		
		SRCLK = 0;
		_nop_();
		_nop_();
		SRCLK = 1;
		
	}
	RCLK = 0;
	_nop_();
	_nop_();
	RCLK = 1;
	
}

void main()
{
	u8 i=0;
	u8 led_data = 0x01;
	while(1)
	{
		if(i==8)
		{
				i=0;
				led_data = 0x01;
		}
		HC595(led_data);
		led_data=led_data<<1;
		delay(50000);
		i++;
		
	}
}