Chapter5: Input and output interfaces P0~P3: Notes from "Single Chip Microcomputer"

Chapter5: Input and output interfaces P0-P3

5.0 Overview

  1. Input and output interface:

    The I/O interface must pass between peripherals and the CPU. The interface plays the functions of buffering and latching data, address decoding, information format conversion, transmitting peripheral status, and issuing commands.
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  2. Parallel interface of microcontroller:

    • I/O interfaces include parallel interfaces, serial interfaces, timer/counter interfaces, etc.
    • The microcontroller has these interfaces internally, and peripherals can be directly connected to the microcontroller (sometimes a driver is required).
    • This chapter introduces the parallel interface of the microcontroller.
  3. Specific interface:

    The 51 microcontroller has four 8-bit bidirectional I/O ports P0, P1, P2, and P3. The four ports have a total of 32 port lines.

    Each port can be input or output by byte , or input or output by bit , which is very convenient for bit control.

5.1 Functions and internal structure of PO~P3 ports

5.1.1 Functions of P0~P3 ports

port Function
P0 1. As an input/output port.
2. As an address/data bus, when connected to a peripheral chip, the P0 port outputs the lower 8-bit address and data signals in a time-shared manner
P1 1. As an input/output port.
2. In the enhanced type (52 series) and ISP type (in-system programming type), the P1 port also has the following functions (just understand it)
P2 1. As an input/output port.
2. As the upper 8-bit address bus.
P3 1. As an input/output port.
2. Used as the second function, each function is defined in the following table

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  • Bits on the same port have the same structure.

  • The similarities between P0~P3 structures:

    1. There are two input buffers, controlled by the read latch and the read pin respectively.
    2. All have latches (i.e. SFR registers P0~P3)
    3. They are all field effect transistor output drivers.
  • The differences between P0~P3:

    1. P0 and P2: transmission of low and high eight-bit address [P0 can also be used as a data line].

    2. P3: Rich bit operations.

    3. P1: It can only do input and output.

5.1.2 Internal structure of P0~P3 ports

  1. P0 port:
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    • Function 1: P0 port is used as I/O port

    ​ 1) The CPU sends a control level "0" to block the AND gate, turning off the T1 tube. At the same time, the MUX switch is connected to the contact below, so that the Q of the latch is connected to the T2 gate.
    2) When the CPU outputs data to the port, the write pulse is applied to the CL of the latch, the data on the internal bus is inverted, and then inverted through the T2 tube. The pin of the PO port appears exactly the same as the internal Bus in-phase data. Since the output driver stage is an open-drain circuit (because T1 is cut off), an external 10K pull-up resistor should be connected when used as an I/O port.

    ​ 3) When input operations are performed, two three-state buffers in the port are used for read operations.
    Buffer 2 is used to read data from port pins (eg: MOV A, P0 instructions).
    Buffer 1 is used to read data from the Q terminal of the latch. When executing the "read-modify-write" instruction (such as: ANL PO, A instruction).
    Whether to read the pin or the latch will be determined by the CPU internally.

    ​ 4) When used as an input port, you should first write "1" to this port to cut off the field effect transistor T2, and then perform the reading operation.
    For example: MOV P0, #0FFH (write all 1 first, then reset to 1) MOV A, P0 (read the pin again) to prevent the read data from all being equal to 0

    • Function 2: Port P0 is used as address/data line

    ​The CPU sends the control level "1", and the switch MUX turns to the upper contact.

  2. Port P1:
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  3. P2 port:
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    1) When expanding the off-chip memory, the MUX switch is turned to the right , and the P2 port is used as the high eight-bit address line to output the high eight-bit address signal.
    The reverse direction of its MUX is controlled internally by the CPU.
    2) When several bits of the P2 port are used as address lines , the remaining P2 port lines cannot be used as I/O port lines .

  4. P3 port:
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    1) When used as the first function (ordinary I/O port), the usage is the same as P1 port.
    2) When used as the second function, the functions are as shown in the table above.
    3) Everyone of the P3 port can set several port lines as secondary functions according to needs , and the remaining port lines can still be used for I/O ; at this time, bit operations should be used .

In conclusion:
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5.2 Programming examples of PO~P3 ports

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5.3 Design LED digital display using parallel port

Keyboards and monitors are commonly used input and output devices in microcontroller application systems. LED digital display is one of the commonly used displays.

The following introduces the method of designing LED digital display circuit and keyboard circuit using the parallel port of single-chip microcomputer.

5.3.1 LED display and its principles

  • Pin arrangement, common cathode, common anode
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    1) See ppt for examples

    2) The glyph codes of common anode and common cathode are different (just inverse code relationship), which can be seen in the ppt table.

    3) Each segment of the LED digital tube requires a driving current of 10~20mA and can be driven by TTL or CMOS devices.

  • There are two methods for controlling the output of glyph codes:
    (1) Hardware decoding method, such as using BCD decoding/driver 74LS48, CD4511 (common cathode) or 74LS46, CD4513 (common anode); (2) Software table lookup method
    . (Common method, need to master)
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    Draw a simple diagram of the pin arrangement + a~dp list. According to the given numbers, compare the pin arrangement diagram and assign the list of a dp. Then the segment code is obtained (this is in the common cathode state). Next, determine what the common pole requirements of the question are? If it's yin, it's over. If it is yang, then determine what range the displayed characters are in. If it is 0 F, directly complement it. What if it is H or P? ?

5.3.2 LED digital tube interface (static, dynamic)

  • Static display:

    Use a parallel port to connect a data tube, and the common terminal com of the digital tube is connected to ground (common cathode) or to Vcc (common anode). Advantages: stable display, no flicker, easy to control. Disadvantages: takes up many interfaces. If the PO port and P2 port are to be used as data lines and address lines, only two digital tubes can be connected using the parallel port of the microcontroller.

    Understand : An I/O interface manages a digital tube. In a very, very small time point, four digital tubes can light up at the same time. Because there is no competition with each other. If you don't expand the interface, you can only have 4 digital tubes at most, because the microcontroller has a total of 4 I/O ports P0~P3. On the physical level: there is one pole, and the other pole is managed by the I/O port.
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  • Dynamic display:

    One interface outputs the glyph code (word selection), and the other interface selects to light up a certain digital tube (bit selection). Using the method of cyclic display of each digital tube, when the cyclic display frequency is high, no flickering display phenomenon can be seen. Advantages: Saves interfaces (2 interfaces can connect 8 digital tubes). Disadvantages: The display may flicker, and the software control is complicated.

    Understanding : Only 2 I/O interfaces are needed in total. At a very, very small point in time, only one digital tube is lit. There is competition between digital tubes. However, since the human eye cannot tell the difference if it is refreshed more than 30 times per second, so at high frequencies, it seems to the human eye that several digital tubes are on. There is no upper limit to the number of digital tubes that can be produced. On the physical level: segment code line + bit selection line. The segment code line is used to transmit the content to be displayed, and the bit selection line is used to control which digital tube you want to light now, that is, the position of the lit digital tube.
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  • Summary of advantages and disadvantages:

    advantage shortcoming
    Static interface: Stable display without flicker, easy software control Occupies a large number of interfaces
    Dynamic interface: Occupies a small number of interfaces The display may flicker and the software control is complicated
  • See ppt for programming examples

5.4 Design keyboard circuit using parallel port

  • Two ways:

    Few keys: connect to a linear keyboard; many keys: connect to a matrix keyboard.

    Each key has its row value and column value, and the combination of row value and column value is the encoding of this key.

    *Matrix keyboard example:
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  • The tasks of the keyboard handler:
    determine whether a key is pressed;
    determine which key is pressed;
    what is the function of the key;
    and eliminate the jitter when the key is closed or opened.

  • Keyboard scanning flow chart
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    1) When P1.0~P1.3 outputs 0, if no key is pressed, the input values ​​of P1.4~P1.7 are all "1". If one of them is not "1", it means A key is pressed.
    2) Then make P1.0~P1.3 output zero one by one (line scan), check whether the input value of P1.4~P1.7 has zero, so as to find out which row and column key is pressed.
    3) When judging the key, if the key jitters, you can use a delay and then reread to skip the jitter period.

    *See ppt for the procedure

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Origin blog.csdn.net/weixin_42067279/article/details/104767071