other people's program
void i2c_Start(void)
{
OLED_I2C_SDA_1(); //SDA 总线置1
OLED_I2C_SCL_1(); //SCL 总线置1
i2c_Delay(); //延时信号
OLED_I2C_SDA_0(); //置 0
i2c_Delay();
OLED_I2C_SCL_0(); //SCL 置0
i2c_Delay();
}
delay function
static void i2c_Delay(void)
{
uint8_t i;
for (i = 0; i < 10; i++);
}
logical analysis test
How to calculate this delay time without an oscilloscope and a logic analyzer, please leave a comment in the expert comment area
Conditions: CPU main frequency 72MHZ, MDK compilation, level 1 optimization
Cycle times 10, SCL frequency = 205 KHZ
Cycle times 7, SCL frequency = 347 KHZ, SCL high level time 1.5us, SCL low level time 2.87us
Cycle times 5, SCL frequency = 421 KHZ, SCL high level time 1.25us, SCL low level time 2.37us
An antique grade item from my side
Working conditions: CPU main frequency 168MHz, IAR compilation environment
void IIC_Delay(void)
{
u32 i = 20;
while( i-- );
}
The problem is that the waveform is not good, and the delay time of IIC_Delay is not enough
reduce frequency
time lapse of wildfire
/*
*********************************************************************************************************
* 函 数 名: i2c_Delay
* 功能说明: I2C总线位延迟，最快400KHz
* 形 参：无
* 返 回 值: 无
*********************************************************************************************************
*/
static void i2c_Delay(void)
{
uint8_t i;
/*
可用逻辑分析仪测量I2C通讯时的频率
工作条件：CPU主频168MHz ，MDK编译环境，1级优化
经测试，循环次数为20~250时都能通讯正常
*/
for (i = 0; i < 40; i++);
}