STM32H5 development (2) ---- new features

STM32H5 vs STM32F4

1. Performance improvement
   Equipped with Cortex-M33 core, 1.5 DMIPS per MHz and 4.09 CoreMark, providing stronger computing power for the system.
   Using advanced 40nm technology, it brings higher system frequency and faster flash access speed.
   With an enhanced system architecture, the overall performance is further improved.

2. New features, high integration, high cost performance
   Utilizing 40nm technology, the internal memory (FLASH+RAM) has been expanded to provide more storage capacity.
   Integrating more new feature peripherals makes the MCU more functional.
   Due to the process upgrade, the area is smaller, making the chip design more compact and improving the cost performance.

3. Power consumption optimization
   Utilizes 40nm technology to optimize dynamic power consumption, so that dynamic power consumption is reduced.
   Static power consumption is also optimized, further saving energy consumption.
   Additional power optimization features further improve power efficiency.

4. Advanced Security Function
   Equipped with Cortex-M33 core and TrustZone technology, it provides stronger security protection.
   Provides device lifecycle management to ensure device security and stability.
   Support debug authentication (Debug Authentication) function to increase the security of debugging.
   Additional security features further protect the system from potential threats.
   To sum up, STM32H5 is a high-performance MCU integrating performance, new features, power consumption optimization and security functions, which will provide developers with better development experience and performance.

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performance improvement

STM32H5 uses Cortex-M33 core, with higher main frequency and performance improvement, it can do more calculations and solve more complex functions in the same time.

Faster FLASH

STM32H5 has a faster access speed. When the access cycle wait is also set to 0ws, the system frequency of F4 can only reach 30MHz, while the system frequency of H5 can reach 42MHz. This means that when running at high frequency, STM32H5 can perform memory read and write operations at a higher speed, improving the response speed of the system.
Also in the case of 5ws, the system frequency of F4 can only reach 180MHz, while the system frequency of H5 can reach 250MHz.

Enhanced System Architecture vs. F4

The design of STM32H5 not only retains the advantages of the previous STM32 series architecture, but also introduces two important features of I-Cache (instruction cache) and D-Cache (data cache), which further improves the operating efficiency of the system.

I-CACHE

I-Cache (instruction cache): I-Cache can cache the instructions executed by the processor, store commonly used instructions in the fast-access cache, and reduce the number of accesses to slow flash memory. In this way, when the program needs to execute the cached instruction again, it can be directly read from the cache without revisiting the flash memory, thereby improving the efficiency of instruction access and speeding up the execution speed of the program.

D-CACHE

D-Cache (data cache): D-Cache is used to cache the data operations of the processor. Similar to I-Cache, it can also store commonly used data in a fast-access cache, reducing the reading of internal RAM or external memory. Write times. By reducing the frequency of accessing external memory, D-Cache can greatly reduce the delay of memory access and improve the data processing efficiency of the system.
DCACHE is a 4KB data buffer. It connects to the Cortex®-M33 core through S-Bus to improve the performance of external storage access. It cannot access on-chip storage units, but can only access off-chip.
STM32H503 series without DCACHE

Performance comparison H5 vs. F4

Higher Dynamic Energy Efficiency

STM32H5 uses an advanced 40nm manufacturing process and is equipped with more energy-efficient transistors. Compared with the STM32F4 series, the STM32H5 has a higher main frequency capability at a low operating voltage and a lower core voltage, which gives the STM32H5 a greater advantage in terms of power consumption optimization.

1. Advanced 40nm process technology: STM32H5 is manufactured using 40nm process, which has smaller transistor size and higher integration than earlier processes. Such a process can significantly improve the performance of the chip and reduce power consumption.
2. More energy-efficient transistors: The transistor design used by STM32H5 has been further optimized in terms of power consumption compared to previous process generations. This means that under the same main frequency, STM32H5 will consume less power, prolong battery life, or reduce energy consumption in scenarios with high environmental protection requirements.
3. Higher main frequency: Under the same operating voltage, STM32H5 allows higher main frequency operation. For example, at a working voltage of 1V, STM32H5 can run at a main frequency of 100MHz, while STM32F4 can no longer run at the same voltage. This means that in applications requiring high performance, STM32H5 can provide faster computing power.
4. Select the main frequency to reduce power consumption: In addition to providing stronger performance at high main frequency, STM32H5 also allows the main frequency to be adjusted according to application needs to reduce power consumption. Running at a lower main frequency will reduce the power consumption of the chip, which is especially suitable for application scenarios with higher power consumption requirements.

Therefore, STM32H5 provides a series of improvements in terms of power consumption optimization, performance improvement and flexibility, making it an ideal choice in many application scenarios, especially in the Internet of Things, mobile devices, industrial control and other fields that focus on energy efficiency and performance

Lower Static Power Consumption

Compared with the STM32F4 series, the STM32H5 series introduces a more flexible supply voltage option in STOP mode, called SVOS (Supply Voltage Operating Scale) mode. The SVOS mode allows developers to choose different operating voltages according to specific needs, so as to achieve different power consumption and wake-up methods.
In STM32H5, the specific SVOS mode and its characteristics are as follows:

1. SVOS3: The working voltage is 1V,
   which is used in scenarios that require high power consumption but still require high performance.
   It can run at a higher frequency and provide faster computing power.
   The wake-up time is relatively fast, which is suitable for applications with high real-time requirements.

2. SVOS4: The working voltage is 0.9V
   to provide a lower working voltage, and the power consumption is lower than that of SVOS3.
   The main frequency may be slightly reduced, but it still provides reasonable computing performance.
   The wake-up time is slightly increased, but the power consumption is lower than SVOS3.

3. 
   SVOS5: The lowest power consumption option with a working voltage of 0.74V , which is very suitable for application scenarios with extremely high power consumption requirements.
   The main frequency will be further reduced, and the computing performance will be weakened accordingly.
   The wake-up time may be longer, which is suitable for periodic wake-up applications that do not require high real-time performance.

By flexibly selecting the SVOS mode, developers can balance the relationship between performance and power consumption according to different application scenarios. For power-sensitive battery-operated devices or applications that need to run for a long time, a lower SVOS mode can be selected to maximize battery life. For tasks with high real-time requirements, you can choose a higher SVOS mode to obtain higher performance.
It should be noted that different SVOS modes may affect the wake-up time and power consumption. Developers need to comprehensively consider the actual needs and application scenarios of the device when choosing a suitable mode.

The figure below shows the power consumption in different working modes.

Power Optimization Features

• Run/Sleep mode

• Clock gating when all peripheral clocks are off (Bus clock gating)
• Low Voltage High Performance I/Os (HSLV)

• Stop mode

• All or part of SRAM disabled (down to 16KB for SRAM2)
• The internal low-power clock CSI can keep running in STOP mode, which can realize fast wake-up and have little impact on power consumption (avoid the consumption caused by CSI startup)

• I/O output status is maintained in Standby mode

• No need to work only in STOP mode in order to keep the output

Power Optimization Tips – Sleep Mode

• Dual clock domains reduce dynamic power consumption
• Clock gating of unused buses, ~5.5% gain)
• Applicable in Run mode

Power Optimization Tips – Stop Mode

• Different measures to minimize power consumption:

• Set all GPIOs to analog mode
• close all storage
• Flash enters power-down mode
• In Stop mode set to voltage level SVOS3/4/5 when all peripheral clocks are turned off, clock gating (Bus clock gating)