TLB function, working process and application scenarios
foreword
In the previous incident, I came into contact with Allwinner’s embedded software recruitment. One question in the offline written test was to talk about the role of TLB. For this purpose, I checked the information on the Internet and made a summary based on my own experience.
TLB introduction, function
The page table is generally large and stored in the memory, so after the processor introduces the MMU, it needs to access the memory twice to read instructions and data: first, obtain the physical address by querying the page table, and then access the physical address to read instructions, data. In order to reduce the processor performance degradation caused by the MMU, TLB is introduced. TLB is the abbreviation of Translation Lookaside Buffer , which can be translated as " Address Translation Lookaside Buffer " or "Fast Table". Simply put, the TLB is the Cache of the page table, which stores the page table entries that are most likely to be accessed at present, and its content is a copy of some page table entries. Only when the TLB cannot complete the address translation task, it will query the page table in the memory, thus reducing the performance degradation of the processor caused by the page table query.
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TLB is the abbreviation of translation lookaside buffer. Be part of the SOC
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Reduced processor performance degradation caused by page table lookups .
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The TLB is the Cache of the page table, which reduces the performance degradation of the processor caused by the MMU .
TLB working process
After joining the TLB, the CPU reads the address process:
The TLB can be queried:
TLB failed to look up:
Application scenarios of TLB
- In power management, when SDRAM is in self-refresh mode, CPU cannot read code from SDRAM, and uses TLB to cache page table and cache to cache code before sleep .
References
The role and working principle of TLB - AlanTu - Blog Park (cnblogs.com)
A story to understand the TLB of the CPU - Zhihu (zhihu.com)