Wang Shuang's "Assembly Language" final exam question bank (with answers)

multiple choice

Chapter One

  1. The smallest information unit of a PC is ( ).

A. bit B. byte C. word length D. word

A The smallest information unit of a PC is a bit (bit), which is often used to represent a binary number (0 or 1). A byte is a data unit commonly used in computers, and a byte consists of 8 bits. The word length (word) refers to the number of bits of a binary number that a CPU can process at one time. A word is a unit used to represent data length in assembly, programming, etc.

  1. The addressing capability of a CPU is 8KB, then the width of its address bus is () bits.

A. 8      B. 3     C. 12     D. 13

The addressability of a CPU is 8KB, that is, the memory space that the CPU can address is 8KB. A byte is 8 bits, so 8KB equals 8 x 1024 bytes, or 8192 bytes. The address bus width of the CPU determines the size of the memory space that the CPU can address. Therefore, the address bus width is log2(8192) = 13 bits. Therefore, the answer is D.

  1. The addressing capability of a CPU is 16KB, so the width of its address bus is ( ) bits.

A. 11                   B. 12                   C. 13                   D. 14

The addressing capability of a CPU is 16KB, that is, the memory space that the CPU can address is 16KB. Because the CPU uses the address bus to address memory, the width of the address bus is the number of binary digits of the maximum memory space that the CPU can address. The binary representation of 16KB is 2^14, so the width of the address bus is 14 bits, and the answer is D.

  1. The address numbers of 1MB memory are from ( ) to ( )

A.0~3ff H           B. 1~400 H           C.  0~fffff H    D.  1~100000H


The memory address of 1MB is numbered from 0 to 0xFFFFF H, because 1MB equals 1024KB and 1KB equals 1024 bytes, so 1MB equals 1024 x 1024 bytes, or 1,048,576 bytes. Each byte needs an address number, so the memory address number of 1MB is from 0 to 1,048,575, which is 0x00000 to 0xFFFFF H in hexadecimal notation. The address ranges of options A, B, and D are all less than 1MB, which does not meet the actual situation.

  1. 1TB is ( ) Byte.

A. 2^40     B. 2^30      C. 2^20               D. 2^10

1TB is 1 trillion bytes (10^12 bytes), and 1 byte is 8 bits (ie 1 byte = 8 bits), so 1TB is equal to 8 x 10^12 bits. In computers, the power of 2 is a commonly used unit of measurement, so converting 8 x 10^12 bits into a power of 2, you can get 1TB equal to 2^40 bytes. Therefore, the answer is A. 2^40.

  1. 1MB is ( ) Byte.

A. 2^40      B. 2^30      C. 2^20     D. 2^10

1MB refers to 1 megabyte, where 1 megabyte is equal to 2 to the 20th power, that is, 2^20, so 1MB is equal to 2^20 bytes, and the answer is C.

  1. The address numbers of 1KB memory are from ( ) to ( )

A. 0~3ff H                   B. 1~400 H          C.  0~fffff H           D.  1~100000H

There are 1024 storage units in 1KB of memory, and each storage unit occupies 1 byte, so there are 1024 address numbers in total. Since the address number starts from 0, the address number of this memory is from 0 to 1023, expressed as 0x000 to 0x3FF in hexadecimal. Therefore, option A is the correct answer. The address number ranges of options B, C, and D are all beyond the address number range of 1KB memory.

  1. 1KB memory can store ( ) bits

A. 1024                B. 8×1024                  C. 1000               D. 8000 

1KB of memory can store 1024 bytes, and 1 byte is equal to 8 bits, so 1KB of memory can store 1024×8=8192 bits. Therefore, the answer is B.

  1. 1GB is ( B ) Byte.

A. 2^40     B. 2^30      C. 2^20               D. 2^10

1GB is 2 to the 30th power Byte, that is, 2^30 Byte. Because 1GB is equal to 1024MB, 1MB is equal to 1024KB, and 1KB is equal to 1024Byte, so 1GB is equal to 1024*1024*1024 Byte, which is 2^30 Byte.

  1. The data bus width of 8086 is 16, and to read 20 bytes of data from memory, 8086 must read ( ) times at least.

A. 16                   B. 20           C. 10                   D. 5

The data bus width of the 8086 is 16, and 16 bits of data can be transmitted each time, that is, 2 bytes. To read 20 bytes of data, 10 reads of 2 bytes are required. Therefore, the answer is C. 10.

  1. The 8386 has a data bus width of 32. To read 20 bytes of data from memory, 8386 must read ( ) times at least.

A. 32                   B. 20           C. 10                   D. 5

The data bus width of the 8386 is 32, and 32 bits (4 bytes) of data can be transmitted each time. To read 20 bytes of data, 5 transfers are required, that is, 20 bytes ÷ 4 bytes/time = 5 times. Therefore, the answer is D.

  1. In memory, data and programs are stored in the form of _______.

A. Binary B. Octal C. Decimal D. Hexadecimal

A In memory, data and programs are usually stored in binary form. This is because all data and instructions in a computer are represented in binary form, that is, binary numbers consisting of 0s and 1s. Computer memory can only store binary numbers, so both data and programs need to be stored in memory in binary form. Although other bases can be used to represent data and instructions in programming, they all need to be converted into binary form before they can be executed in the computer. Therefore, binary is the most basic number system in computers.

  1. The width of the address bus of the 8086CPU is 20 bits, and the width of the data bus is 16 bits, so the addressing capability of the 8086CPU is ( ).

A. 64KB B. 1MB C. 1GB D. Not sure

The address bus width of B 8086CPU is 20 bits, and the number of addresses that can be addressed is 2 to the 20th power, that is, 1MB.

  1. The address bus width of 80386CPU is 32, and the addressing capability of 80386CPU is ( ).

A.64KB    B.1024KB   C.16MB      D.4096MB

 The address bus width of the 80386CPU is 32, and the physical address space that can be addressed is 2 to the 32nd power, that is, 4GB. Therefore, the addressing capability of 80386CPU is D. 4096MB.

  1. To read 1024 bytes of data from memory, 80386 CPU needs to read at least 256 times, then the data bus width of 80386 is ( ) bits.

A.4       B.8     C.16      D.32

 The data bus width of the 80386 CPU is 32 bits. 

1024 bytes of data are read from the memory, and the data width of each read is 1 byte, so it needs to be read 1024 times. 

The data bus width of the 80386 CPU is 32 bits, and 4 bytes can be transmitted each time, so 4 bytes of data can be read each time. Therefore, it needs to be read 1024 times, that is, it needs to transmit 1024 * 1 byte of data, a total of 1024 * 1 / 4 = 256 times.

  1. In 8086, a word unit can store ( ) bits.

A.1    B.8    C.16     D.32

 8086 is a 16-bit processor, and a word unit can store 16 bits, so the answer is C.16.

  1. How many storage units does a 1KB memory contain? How many binary bits can be stored? ( )

A. 1024,1024    B. 8192,1024     C. 8192,8192     D. 1024,8192

A 1KB memory contains 1024 memory locations because 1KB equals 1024 bytes. Each byte consists of 8 binary bits, so a 1KB memory can store 8 x 1024 = 8192 binary bits. Therefore, the answer is option D, that is, a 1KB memory contains 1024 memory cells, which can store 8192 binary bits.

Chapter 2 ~ 3

  1. In Debug, check the memory with "d 075A: 110 11F", the results are as follows:

075A:0110  B8  00  00  FF  07  00  B8  4C — CD  21  F3  69  20  8A  03  A1 

Then, the address corresponding to the font data 00B8H is ( ).

A. 076A: 11 B. 076A: 16 C. 076B: 0 D. Not sure

C cs+ip 075a+0110=076b, the 0th

  1. The given segment address is 1234H, and the addressing range of the 8086CPU is _________ (physical address) only by changing the offset address.

A、 12340H~1234FH                    B、 01234H~F1234H          C、 12340H~2233FH            D、 12340H~FFFFFH

The offset address in the 8086CPU is a 16-bit value, which needs to be added to the segment address to obtain the physical address. Therefore, only when addressing is performed by changing the offset address, the range of the physical address depends on the value of the segment register.

In this question, the given address is 1234H, which is only addressed by changing the offset address, which means that the DS register (or ES, SS, CS) is used as the segment register. Because in real mode, the value of the segment register is shifted left by 4 bits as the segment address, and the offset address can be added to get the physical.

The range of offset address change is 0~FFFFH, so:

The physical address is limited to 12340H (segment address is 1234H, plus offset address 0H);

The upper limit of the physical address is 2233FH (the address is 1234H, plus the offset address FFFFH).

Therefore, option C: 12340H~2233FH is correct.

  1. Given the segment address 101H, only by changing the offset address addressing, the 8086CPU can address the memory unit whose address is (). 

         A. 0     B. 12000H      C. 10000H      D. 1FFFFH

C 1010+0~FFFF=1010~1100F

  1. Among the following registers, ( ) is an 8-bit register.

A、 AX B、 BL C、 CS D、 DI

Among the following registers, B. BL is an 8-bit register.

  1. Among the following registers, ( ) is a 16-bit register

A、 AX              B、 BL               C、 CH              D、 DL

Among the following registers, A. AX is a 16-bit register.

  1. Which of the following statements is correct ( )

A. The AX register cannot be divided into two 8-bit registers

B. The BP register cannot be divided into two 8-bit registers

C, CS can be divided into two 8-bit registers

D. PSW is a general-purpose register that can store general data

Which of the following statements is correct: B

B. The BP register cannot be divided into two 8-bit registers

The BP register (Base Pointer) is a 16-bit register and cannot be divided into two 8-bit registers. It is usually used to store the base address of the stack frame.

A. The AX register can be divided into two 8-bit registers. The AX register is a 16-bit register, but it can be divided into two 8-bit registers, AH (high) and AL (low).

C. The CS register cannot be divided into two 8-bit registers. The CS register (Code Segment) is a 16-bit register used to store the starting address of the code segment of the currently executing instruction.

D. PSW (Program Status Word) is not a general-purpose register, it is a special register used to store program status information, such as flag bits, etc. It cannot be used to store general data.

  1. In the following instructions, the wrong instruction is ( ).

A、 MOV  AX,1000                      B、 MOV  AL,BL

C、 MOV  AL,1000                     D、 MOV   DS,AX

The wrong command is:

C、 MOV AL,1000

This instruction tries to move the immediate value 1000 into the AL register, but AL is an 8-bit register and cannot hold the 16-bit immediate value 1000. The correct way to write it should be to use an appropriate register size or an effective immediate value.

The value range of the eight-bit register AL is 0 to 255 (FFFF H)

  1. In the following instructions, the wrong instruction is ( ).

A、 MOV  AX,100               B、 MOV  BX,AL

C、 MOV AL,100 D、 ADD AL,BL

B MOV BX,AL is a wrong instruction. Since BX is a 16-bit register and AL is an 8-bit register, it is not possible to directly move the value of AL into BX. The correct way should be to use the AX register as an intermediary to move the value of AL to AX first, and then move the value of AX to BX.

The correct instruction should be MOV AX,AL, then MOV BX,AX. First move the value of AL to AX, then move the value of AX to BX

  1. Among the following instructions, the correct instruction is ( ).

A、 MOV  AX,100               B、 MOV  BX,AL

C、 MOV  100,AL            D、 ADD  AL,1234H

A、 MOV AX,100

This instruction moves the immediate value 100 into the AX register, which works.

  1. After the following 5 instructions are executed, how many times does the CPU modify the IP? ( )

mov ax,2000H

mov bx,3000h

add ax,bx

sub bx,bx

etc

A, 5 B, 6 C, 7 D, not sure

During the execution of the instruction, the CPU will constantly modify the value of IP to point to the next instruction to be executed.

When the first mov ax, 2000H instruction is executed, the address of the next instruction to be executed will be stored in the IP register. At this time, the address pointed to by IP is the address of the second instruction, namely mov bx, 3000h.

When the second mov bx, 3000h instruction is executed, the address of the next instruction to be executed will be stored in the IP register. At this time, the address pointed to by IP is the address of the third instruction, namely add ax, bx.

When the third add ax, bx instruction is executed, the address of the next instruction to be executed will be stored in the IP register. At this time, the address pointed to by IP is the address of the fourth instruction, namely sub bx, bx.

When the fourth sub bx, bx instruction is executed, the address of the next instruction to be executed will be stored in the IP register. At this time, the address pointed to by IP is the address of the fifth instruction, namely jmp bx.

When executing the fifth jmp bx instruction, the address of the next instruction to be executed will be stored in the IP register. At this time, the address pointed to by IP is the address stored in bx, which is the address of the second instruction, namely mov bx, 3000h . However, the value of bx is already 0 at this time, so the program will loop infinitely and no longer modify the value of IP.

Therefore, after executing these 5 instructions, the CPU will modify the IP 6 times.

  1. The code segment register is ()

A、 CS               B、 DS               C、 SS               D、 ES

The code segment register is CS (Code Segment Register). The CS register stores the segment address where the current program code is located, and is used to point to the program code segment that the CPU needs to execute. The program starts with the first instruction pointed to by the CS register, and the instructions are executed sequentially until the end of the program.

  1. The instruction pointer register is ()

A、 AX              B、 BP               C、 IP                D、 DS

The instruction pointer register is IP (Instruction Pointer). The address of the next instruction to be executed is stored in the IP register. After the CPU executes an instruction, it will automatically go to the IP register to read the address of the next instruction, and then continue to execute.

  1. In debug, the ( ) command is used to view and modify the register contents of the CPU.

A、 T                 B、 A                 C、 E                 D、 R

Use the R command to check and change the contents of the CPU registers,
use the D command to check the contents of the memory,
use the E command to rewrite the contents of the memory, use the U command to translate
the machine instructions in the memory into assembly instructions, and use the T command to execute a machine instruction. The format of an assembly instruction writes a machine instruction in memory

  1. In debug, the ( ) command is used to view the contents of the memory.

A、 T                 B、 A                 C、 D                D、 R

D

  1. In debug, modifying the content in memory is the () command.

A、 T                 B、 E                 C、 D                D、 R

B

  1. In debug, the instruction at the memory unit pointed to by CS and IP is the ( ) command.

A、 T                 B、 E                 C、 D                D、 R

In debug, executing the instruction at the memory unit pointed to by CS and IP is Ta command. The T command can execute an instruction step by step. After the execution, the CPU pauses and waits for the next command from the user. After executing the current instruction, you can use the R command to view the value of the register, and the L command to view the memory status after the current instruction is executed.

  1. The physical address of storage unit 45A0:7CB9H is ( )

A、 45AB9H               B、 4D6B9H                C、 C259H                  D、 47CB9H

Assuming that there are 16 address lines in the storage unit, then the physical address should be `45A0H` shifted 4 bits to the left, namely `45A00H`. Add the offset `7CB9H` to get the real physical address as `45A0H + 7CB9H = 4D69H`. Therefore, option B `4D6B9H` is correct.

  1. In the 8086CPU, at any time, the CPU executes the content pointed to by ( ) as an instruction.

A. DS、SI     B. CS、IP     C. SS、SP      D. ES、DI

In B 8086CPU, at any time, the CPU executes the content pointed to by CS and IP as an instruction, that is, the instruction pointer register (IP) stores the offset address of the next instruction in the code segment, and the code segment register (CS) stores the code segment base address. The CPU gets the physical address of the instruction from the base address of the code segment plus the offset address, and then reads the instruction from the memory and executes it.

  1. Which of the following statements about Debug is wrong ( ).

A. The R command can modify the content of the register. B. The E command can modify the content of the memory unit.

C. The T command only executes one instruction at a time. D. The D command can view the contents of the memory unit.

  1. For 8086CPU, the wrong instruction is ( ).

A. mov ax,bx     B. mov ax,[bx]     C. mov ds,0      D. mov ax,0

For 8086 CPU, the wrong instruction is C. mov ds,0. In the 8086CPU, DS is used as a register to store the address of the data segment. Normally, it should be set to a non-zero value instead of being cleared directly. The other three instructions are legal: A. mov ax, bx means to copy the value in the BX register to the AX register; B. mov ax, [bx] means to read the value in the memory unit specified by BX into AX register; D. mov ax,0 means to clear the value in the AX register.

  1. After the following instructions are executed, the value of the register ax is ( ).

mov ax, 0095h
mov ah, 95h
add al, ah

A. 9680H B. 968AH C. 962AH D. 952AH

The execution process of the command is as follows:

1. Assign 0095h to the AX register, and the value of AX is 0095h;
2. Assign 95h to the AH register, and the value of AX is 9595h;
3. Add the values ​​of the AL register and the AH register (95h + 95h = 12Ah), store the result in the AL register, and the value of AX becomes 952Ah at this time.

Therefore, option D is the correct answer.

  1. Regarding the 8086CPU, which of the following statements is wrong ( ).

A. It is a CPU with a 16-bit structure, and the maximum length of the temporarily stored information that can be processed and transmitted at one time is 16 bits

B. Use the method of "segment address × 16 + offset address = physical address" to generate the address of the storage unit

C. When executing the push instruction and pop instruction, the 8086CPU gets the address of the top of the stack from SS:SP

D. When programming, a group of continuous addresses with a length of 1KB and a memory unit whose starting address is a multiple of 32 can be used as stack space.

The error in option D lies in "the starting address is a multiple of 32", but it should actually be "the starting address is a multiple of 16".

When programming, some memory locations can be used as stack space. Any 16-bit register (such as SS) can be used to store the segment address of the stack, and the SP register can be used to keep track of the stack pointer. For the 8086 CPU, the stack pointer SP should always point to an even address. Therefore, the size of the stack should be an even number, and the starting address of the stack should be a multiple of 16. Therefore, "the starting address is a multiple of 32" in option D is wrong.

The correct statement is: When programming, a group of memory units with a length of 1KB and continuous addresses and whose starting address is a multiple of 16 can be used as stack space.

  1. At this time, the value of ax is 00C5H, what is the value in ax after executing "add al,85H"? ( )

A.0158H    B.014AH    C.0058H    D.004AH

The correct answer is D, which is 004AH. Because the meaning of the "add al,85H" instruction is to add 85H to the value of the al register, that is, al=al+85H. Calculate 00C5H+85H=00CAH, and al is only the lower 8 bits of ax, so what remains unchanged in ax is the value of the upper 8 bits ah (00H), while the value of the lower 8 bits al changes to 0CAH. Therefore, the value of ax is 0CA00H, which is 004AH

  1. Regarding the concept of "segment" in assembly language, which of the following statements is wrong ( ).

A. Before using mov, add, sub and other instructions to access the data in the data segment through the offset address, the segment address of the data segment should be placed in ds.

B. A segment can be both a data segment and a stub segment.

C. A segment cannot be both a code segment and a data segment.

D. Whether the content in a segment is an instruction or data for the CPU, the key lies in the setting of the relevant registers.

C. A segment cannot be both a code segment and a data segment. It is a wrong statement.

In assembly language, a segment can be both a data segment and a code segment. However, a segment can only be a data segment or a code segment at the same time, and cannot be both types at the same time.

  1. The maximum length of a segment of 8086PC is ( ).

A.64Byte    B.64Kbit   C.1MB    D.64KB

 The maximum length of a segment of 8086PC is 64KB (D)

  1. The following statement about the stack mechanism of 8086CPU is wrong ( ).

A. At any time, SS:SP points to the top element of the stack.

The B.retf instruction will not cause the stack space to exceed the bounds.

C.push and pop are essentially a memory transfer instruction.

D. The stack mechanism of the 8086CPU does not provide support for avoiding stack space overrun.                  

 B stack space autonomous management

  1. Set the memory space from 10000H to 1FFFFH as the stack segment, and the initial state stack is empty. At this time, the values ​​of SS and SP are ( ).

A.SS=1000H、SP=FFFEH               B.SS=0H、SP=FFFEH

C.SS=1000H、SP=0                       D.SS=2000H、SP=0

 And the stack is empty, SP should point to the next position 20000 at the bottom of the stack, D.SS=2000H, SP=0

  1. The instruction or instruction sequence that completes the same function as the instruction XCHG AX, BX is ( )

A、 MOV AX,BX 

B、 MOV BX,AX 

C、 PUSH AX

POP BX

D、 MOV CX,AX 

MOV AX,BX

    MOV BX,CX 

XCHG is an instruction in x86 assembly language to swap the values ​​of two registers or memory locations. Its function is to exchange the values ​​of two operands (which can be registers or memory units).

For example, executing the instruction "XCHG AX, BX" will exchange the values ​​in the AX and BX registers. After the instruction is executed, AX contains the original value of BX, and BX contains the original value of AX.

You can use the combination of MOV AX, BX and XCHG AX, BX instructions to complete the same function as XCHG AX, BX, the instruction sequence is:

MOV CX, AX MOV AX, BX MOV BX, CX

This instruction sequence swaps the values ​​of AX and BX, realizing the same function of XCHG AX, BX.

  1. The stack segment segment register is ()

A、 CS               B、 DS               C、 SS               D、 ES

 The stack is a data structure used to store information such as temporary data and return addresses in the program. The stack segment (segment) refers to the segment where the stack is located, that is, the physical memory area where the stack is stored. The stack segment consists of the stack segment address (Segment Address) and the stack segment offset address (Stack Offset). The segment address of the stack is stored by the stack segment register (Stack Segment Register).

Therefore, the answer is C, SS (Stack Segment Register).

  1. The stack pointer register is ()

A、 BP              B、 SP               C、 SS               D、 IP

 The stack pointer (Stack Pointer) register is a register used to indicate the top address of the current stack. It points to the next free location on top of the current stack. When accessing the stack, the stack pointer is first decremented by 1, and then the data is pushed into the stack;

Therefore, the name of the stack pointer register is B, SP (Stack Pointer).

  1. Execute a PUSH instruction, the SP register will ( )

A, plus 1 B, minus 1 C, plus 2 D, minus 2

 Execute a PUSH instruction, and the SP register will be decremented by 2 (D). Because in the 8086CPU, each stack element occupies two bytes, so when executing the PUSH instruction, first subtract 2 from the stack top pointer SP, and then write the data to the top of the stack.

  1. Execute a POP instruction, the SP register will ( )

A, plus 1 B, minus 1 C, plus 2 D, minus 2

 Execute a POP instruction, the SP register will be incremented by 2 (C). Because in the 8086CPU, each stack element occupies two bytes, so when the POP instruction is executed, the top element of the stack is first popped and written into the target operand, and then the top pointer SP of the stack is added to point to the next stack element.

  1. Regarding the 8086CPU stack, which of the following statements is incorrect ( )

A. The operation object is a word B. The length of the stack is unlimited

C. At any moment, SS:SP points to the top element of the stack D. The stack is in memory

B stacks can only be set to a maximum of 64KB

  1. The following instruction is correct ( )

A、 POP  AX             B、 POP  126CH                C、 PUSH  AL           D、 PUSH  AX,BX

 A  

  1. In the 8086 system, what is the maximum value of a stack? ()

A、 1MB           B、 1KB             C、 64KB           D、 64MB

 In the 8086 system, a stack can only be set to a maximum of 64KB, because the 8086 has only 16-bit addressing capability, and each memory address can only represent a maximum of 64KB of memory space, and the stack is stored in memory, so the size of a stack The maximum can only be 64KB. So the answer is C, 64KB.

  1. If you want to set the space between 20000h~21001h as a stack, the initial state stack is empty, you should select the program segment ().

A、MOV  SS,20000H

MOV  SP,21001H

B、MOV  AX,2000H

MOV  SS,AX

MOV  SP,1001H

C、 MOV  AX,2000H

MOV  SS,AX

MOV  SP,1002H

D、 MOV  AX,2000H

MOV  SS,AX

MOV  SP,1000H

 C SS needs to use general-purpose registers to transfer, and the stack empty points to the next position on the top of the stack

  1. Let the initial value of SP be 2000H, after executing the command "PUSH AX", the value of SP is ()

A、 1FFFH                   B、1998H           C、 2002H                   D、1FFEH

The PUSH instruction pushes the data in the register or memory unit into the stack, and at the same time, the value of SP is decremented by 2, pointing to the next free stack unit.

After the instruction "PUSH AX" is executed, the value of the AX register will be pushed onto the stack, and the value of SP will be decremented by 2. Therefore, the final value of SP should be 2000H-2=1FFEh. So the answer is D, 1FFEH.

  1. In debug, check the memory with "d 1000:0 0f", the result is as follows.

1000:0000 89 85 4C ED 38 7B ​​F8 10 -29 8D 44 9D 3E 75 A8 20

If DS=1000H, AX=0, then the value of AX after the assembly instruction "MOV AL,[0008H]" is executed is

A、 0H         B、 2900H               C、 0029H                  D、 0010H

 In debug, check the memory with "d 1000:0 0f", the result is as follows. 1000:0000 89 85 4C ED 38 7B ​​F8 10 -29 8D 44 9D 3E 75 A8 20

If DS=1000H, AX=0, then the value of AX after the assembly instruction "MOV AL,[0008H]" is executed is D, 0010H.

The assembly instruction "MOV AL, [0008H]" reads the data whose offset address is 0008H into the AL register. Since DS=1000H, the address of the memory unit to be accessed should be DS:0008H, which is 10008H. According to the given memory content, it can be known that the value stored at 10008H is 10H, so after executing the "MOV AL, [0008H]" instruction, the value of AL is 10H, while the high bit of the AX register remains unchanged, which is 00H .

Therefore, the value of AX is 0010H.

  1. In debug, check the memory with "d 1000:0 0f", the result is as follows.

1000:0000 89 85 4C ED 38 7B ​​F8 10 -29 8D 44 9D 3E 75 A8 20

DS=1000H, AX=0, then the value of AX after the assembly instruction "MOV AX,[0008H]" is executed is

A、 1029H                 B、 298DH                 C、 2910H                  D、 8D29H

 C  

  1. In debug, check the memory with "d 1000:0 0f", the result is as follows.

1000:0000 89 85 4C ED 38 7B ​​F8 10 -29 8D 44 9D 3E 75 A8 20

1000:0010 79 87 C4 EF 25 66 F7 40 -A9 BD C4 5D 6E 7F A1 2B

1000:0020 81 15 4D ED 83 B7 8F 1A -89 7D B6 9C 3E 73 A2 21

Before execution, DS=0, AX=0, BX=0, then execute the following assembly instructions, and the value of AX after completion is ( )

MOV  AX,1002H

MOV  DS,AX

MOV  AX,[0]

A、 8589H                 B、 8779H                  C、 1581H                  D、 8985H

C  DS:IP 1000:20 

  1. In debug, check the memory with "d 1000:0 0f", the result is as follows.

1000:0000 89 85 4C ED 38 7B ​​F8 10 -29 8D 44 9D 3E 75 A8 20

1000:0010 79 87 C4 EF 25 66 F7 40 -A9 BD C4 5D 6E 7F A1 2B

1000:0020 81 15 4D ED 83 B7 8F 1A -89 7D B6 9C 3E 73 A2 21

Before execution, DS=0, AX=0, BX=0, then execute the following assembly instructions, and the value of AX after completion is ( )

MOV  AX,1000H

MOV  DS,AX

MOV  AX,[0]

A、 8589H                 B、 8779H                  C、 1581H                  D、 8985H

 A

  1. There are the following instructions (instruction format under debug):
          mov ax,1000
             mov ss,ax
             mov sp,0100
             mov ax,5CCA
             push ax
          After the instruction "push ax" is executed, the value of sp and the address of the modified memory unit are ( ).
    A. 0100H, 1000H: 0100H B. 00feH, 1000H: 00feH C. 0100, 1000: 0100 D. 98, 1000: 98

B sp-2

  1. If the memory space of 10000H~1FFFFH is regarded as the stack space, assuming SS=1000H, then the following statement is correct ( ).  

A. When the stack is empty, the value of SP is FFFeH B. When the stack is full, the value of SP is 0

C. The size of this stack space is 4KB D. Using this stack space, there may be a stack out of bounds

 D. Using this stack space, there may be a stack out of bounds: Since the stack grows downward, in the process of using the stack, if the data pushed into the stack exceeds the size of the stack, a stack overflow will occur ( stack overflow), causing the program to terminate abnormally. Therefore, when using this stack space, there may be a problem of stack out-of-bounds.

  1. Given a segment address of 1001h, the 8086CPu can address the memory unit whose physical address is ().

A.0      B.20000H       C.10000H         D.20010H

  1. The address passed by the CPU to the address bus is ( ).

A. Logical address B. Offset address C. Physical address D. Segment address

The addresses that the CPU passes onto the address bus are physical addresses.

In the 8086 processor using the segmentation mechanism, the address generated by the CPU has two parts, one is the segment address, and the other is the offset address. They obtain the final physical address through certain calculations. However, when the CPU needs to access the memory, it will directly transfer the finally obtained physical address to the address bus, and the memory controller will determine the actual memory unit to be accessed according to the physical address. Therefore, the addresses that the CPU passes onto the address bus are physical addresses.

  1. Regarding several registers of 8086CPU, the correct statement is ( ).

A. BX can be regarded as two 8-bit registers. When the offset address range is 0~255, you can use "mov ax,[bl]" to read the data in the memory into ax

B. You can use "byte ptr" to use SI as two 8-bit registers

C. AX, BX, CX, DX can be used as 8 8-bit registers

D. AX, ah, and al are different registers, and the execution of the instruction "add al, bl" will not affect the value of AX

B can use "byte ptr" to realize the use of SI as two 8-bit registers.

In x86 assembly language, keywords such as "byte ptr", "word ptr", and "dword ptr" can be used as the prefix of the instruction operand to determine the data type to be accessed. Therefore, "byte ptr" can be used to treat the SI register as a separate 8-bit register.

For example, in the 8086 processor, the MOV AL,[SI] instruction can be used to read a byte from the memory location stored at DS:SI. If you want the SI register to be treated as two 8-bit registers, you can write the instruction like this:

MOV AL, [BYTE PTR SI]
MOV AH, [BYTE PTR SI + 1]

In this way, the SI register can be regarded as two independent 8-bit registers by specifying the "BYTE PTR" prefix, corresponding to the memory units stored at DS: SI and DS: SI+1.

  1. Which of the following statements related to 8086CPU addressing is wrong ( ).

A.8086CPU has 20 address buses, and its addressing capability is 1MB

B. A physical address can correspond to multiple segment addresses and offset addresses

C. Because the segment register is 16 bits, the maximum size of a segment is 64KB

D. There is an address adder inside the CPU that can synthesize 20-bit addresses

The statement that option B is related to 8086 CPU addressing is false. A physical address can only correspond to a unique segment address and offset address.

Option A is correct, 8086CPU has 20 address buses, and its addressing capability is 1MB.

Option C is correct, because the 8086CPU uses a segmentation mechanism in real mode, and each segment can address a maximum of 64KB of space.

Option D is correct. There is an address adder inside the CPU that can synthesize 20-bit addresses, which is used to combine segment addresses and offset addresses into physical addresses.

The following statements are false:

B. A physical address can correspond to multiple segment addresses and offset addresses.

Each physical address will only correspond to a unique segment address and offset address. Since the 8086 CPU uses a segmented addressing mechanism, the same physical address may be obtained by combining different segment addresses and offset addresses. But conversely, a physical address has only one value.

All three options A, C, and D are correct:

A. 8086CPU has 20 address buses, and its addressing capability is 1MB. Among them, 20 address buses can address 2^20 memory units, that is, 1MB of memory space.

C. Because the segment register is 16 bits, the maximum size of a segment is 64KB. When using the segmentation mechanism, the size of a segment is determined by the value of the segment register. Therefore, when using a 16-bit segment register, the maximum size of a segment is 64KB.

D. There is an address adder inside the CPU that can synthesize 20-bit addresses. In the 8086CPU, the physical address is composed of a segment address and an offset address, and these two parts are added by an address adder to form a 20-bit physical address. This address adder converts segmented addresses into actual physical addresses.

  1. After the following instructions are executed, the value of SP is ( ).

mov sp,0

push ss

A.0 B.0fffeh C.2 D. Memory ss: the value of the data at 0

 B

After the instruction is executed mov sp, 0, the value of the SP register is assigned to 0.

Then execute push ssthe instruction to push the value in the SS register onto the stack. Since the stack grows downward in the 8086CPU, pushing the stack will decrease the value of SP by 2. Therefore, the value of SP at this time is -2 (0xFFFF FFFEH).

Option B: 0fffeh is the result of the above calculation, so the answer is B.

  1. Use the debug e command to write data to b810:0010, and then use the d command to check, and find that there is no newly written data at b810:0010, the reason is ( ).

A. This is used to store the system time, which has been automatically updated

B. There is a delay in debug, and you can see the data written by the e command when you check it for the second time

C. This is in the ROM space and cannot be changed

D. This is in the video memory space. When the screen is refreshed, the data here is updated

 C

  1. In 8086CPU, if the physical address of a certain memory unit is 4FCE0, its segment address and offset address must not be ( ).

A.4FC0:00E0    B.4CE0:2EE0    C.40CE:0F00    D.40C0:F0E0

 B adds up

  1. After the following instructions are executed, the value of the AX register is ( ).

mov ax,017ch

add al,0b4h

A.0130H     B.0230H     C.012FH     D.022FH

A only looks at the low bit 7c+b4

Chapter 4~ 6

  1. How many steps does an assembly source program go through from being written to being executed by the CPU? ( )

A. Compile, load, link, execute B. Load, compile, link, execute

C. Link, compile, load, execute D. Compile, link, load, execute

The correct answer is D. Compile, link, load, execute.

Here is an explanation of each step:

  1. Compilation: First, the source program needs to be compiled by a compiler, which translates the source code of the high-level language into the object code of the machine language. The compilation process converts source code into executable binaries.

  2. Link: The linker links the compiled object code with other necessary library functions or modules to generate the final executable file. The linker resolves the reference relationship between the various modules and generates all the symbol and address information required by the executable file.

  3. Loading: The executable file is loaded into memory, and the operating system is responsible for reading the file from the hard disk into the appropriate location in memory. During the loading process, the operating system allocates memory space for the executable file and loads the program's instructions and data into the corresponding memory addresses.

  4. Execution: After the program is loaded into memory, the CPU starts executing the program. The CPU executes the instructions in the program one by one in the order of the instructions, reads the data from the memory into the register for calculation, and then writes the result back to the memory or register.

Therefore, compiling, linking, loading, and executing are the correct sequence of steps from writing the assembly source program to being finally executed by the CPU.

  1. Regarding compilation and linking, the wrong statement is ( ).

A. The *.obj file generated by compilation cannot be run directly under the operating system

B. There is no directive in the *.exe file generated by the connection

C. Compilation can check out syntax errors

D. Connections can check out logic errors

The wrong statement is D. .

explain:

A. The compiled *.obj files cannot be run directly under the operating system: This is the correct statement. The compiler compiles the source code into object code (*.obj file), which contains machine language instructions and data, but has not yet completed the final link process, so it cannot be run directly under the operating system.

B. There are no directives in the *.exe file generated by the link: When the linker links the object code into an executable file, it may convert directives (such as those used for program entry points and initialization) into real machine instructions. These directives are present in the final executable.

C. Compilation can check for syntax errors: This is the correct statement. When the compiler compiles the source code, it performs lexical analysis and syntax analysis to check for syntax errors in the code. If a syntax error is found, the compiler will report the error and stop the compilation process.

D. Connections can detect logic errors: This is a false statement. The main task of the linker is to resolve the reference relationship between modules, combine the object code of each module, and generate an executable file. Linkers do not involve checking for logical errors, which are usually not found until program execution.

Therefore, the wrong statement is that there is no directive in the *.exe file generated by B. connection.

  1. There are two segments defined in the following order in the source program:
           a segment 
                       db 1,2,3,4,5,6,7,8 
             a ends 
             b segment 
                       db 1,2,3,4,5,6,7 ,8 
             b ends 
          If the physical address of the data "1" in segment a is X, then the physical address of the data "1" in segment b is ( ).
           A. X B. X+1 C. X+16 D. X+64

C section at least 16B db byte dw word dd double word

  1. After Debug loads the program, assuming that the segment address of the PSP is SA and the offset address is 0, the starting address of the program is ( ).

A. SA×16H B. SA×16 C. (SA+16H)×16H D. (SA+16)×16

In the real mode of the x86 architecture, PSP (Program Segment Prefix) is the program segment prefix, which is located at the beginning of the memory segment address and is used to store information about the program. The location with offset address 0 is at the beginning of the PSP.

The segment address of the PSP is SA, and the offset address is 0, which means that the physical address of the PSP is SA×16 (because the segment address is multiplied by 16 to obtain the physical address). Since the offset address is 0, the starting address of the program is the physical address of the PSP.

Therefore, the answer is B. SA×16

  1. Which of the following statements about assembly language source programs is wrong ( )

A. An assembly language source program needs to go through from writing out to executing. Write .asm file → compile .asm file into .obj file → connect .obj file into .exe file → execute .exe file.

B. In the assembly language source program, there are three kinds of instructions: assembly instructions, pseudo-instructions, and other symbols.

C. In an assembly language source program, pseudo-instructions that are not executed by the compiler have corresponding machine instructions.

D. In an assembly language source program, an assembly instruction is an instruction with a corresponding machine code, and the corresponding machine instruction is executed by the CPU.

It is wrong to say that C. In an assembly language source program, pseudo-instructions that are not executed by the compiler have corresponding machine instructions.

explain:

A. The process from writing an assembly language source program to execution usually includes compiling the assembly language source file (.asm) into an object file (.obj) and linking the object file into an executable file (.exe), and finally executing the executable executable file. Therefore, option A describes the correct sequence of procedures.

B. The assembly language source program contains three types of instructions: assembly instructions (corresponding to machine instructions), pseudo-instructions (used for assembly process control and data definition, etc., without generating machine instructions) and other symbols (such as labels, variable names, etc.). This is the correct statement.

C. In an assembly language source program, pseudo-instructions are usually executed by an assembler or compiler, and they do not generate corresponding machine instructions. Pseudo-instructions are used to provide functions such as instruction control, macro expansion and data definition in the assembly process. Therefore, it is wrong to say that pseudo-instructions have corresponding machine instructions.

D. Assembly instructions are instructions with corresponding machine codes, and the corresponding machine instructions are executed by the CPU. This is the correct statement.

To sum up, it is wrong to say that C. In an assembly language source program, pseudo-instructions that are not executed by the compiler have corresponding machine instructions.

  1. The assembly compiler "masm.exe" is stored in the "c.\masm" directory. An assembly source program "t1.asm" is stored in the root directory of disk c. After entering the "c.\masm" directory under DOS, how to compile "t1.asm" in a simplified way? ( )

A. masm t1 B. masm t1; C. masm c.\t1 D. masm c.\t1;

C

  1. mov ax,4c00h

Int 21h

After the CPU executes these two instructions, ( ).

  1. Return to DOS B. Return to DEBUG C. Return to COMMOND D. None of the first three options are correct

After executing these two instructions, the CPU will return to DOS.

explain:

The function of these two instructions is to call the system function of DOS. Specifically, "mov ax, 4c00h" stores 4c00h (32768 in decimal) in the register AX, and then "Int 21h" executes the interrupt instruction, transferring control to the DOS interrupt handler, which is based on the value in AX Take the appropriate action.

In this case, DOS uses the exit function with function code 4c, and the value in AX is the exit code. Since the exit code given in the instruction was 4c00h, the CPU will return to DOS with that exit code as the return status.

Therefore, the correct answer is A. Go back to DOS.

  1. Which of the following statements is correct ( ).

A. The information in the code segment will be executed as instructions

B. CS: The instruction pointed to by the IP must have been executed by the CPU

C. Using the t command of Debug, only one assembly instruction can be executed at a time

D. The association between the segment and the segment register established by "ASSUME" is handled by the compiler

The correct statement is D. The association between the segment and the segment register established by "ASSUME" is to be handled by the compiler.

explain:

A. Not all information in the code segment is executed as instructions. Code segments contain instructions and other data such as constants, variables, etc. The CPU determines the next instruction to execute based on the values ​​of CS (code segment register) and IP (instruction pointer register).

B. CS: The instruction pointed to by IP is not necessarily executed by the CPU. CS: The location pointed to by IP is the address of the next instruction to be executed, but there is no guarantee that the CPU has executed the instruction.

C. Use the "t" command of Debug to execute assembly instructions in a single step, and only execute one instruction at a time.

The "t" command is used in the Debug tool to step through assembly instructions. Each time the "t" command is executed, Debug will execute the instruction pointed to by the current CS:IP and update CS:IP to the address of the next instruction. Thus, if the next instruction is an unconditional jump instruction (such as JMP), then one "t" command will execute multiple instructions.

Therefore, the number of assembly instructions executed using the "t" command depends on the control flow and the presence of jump instructions in the program. If there are no jump instructions or only sequential instructions in the program, then only one instruction will be executed each time the "t" command is executed. However, if there are jump instructions in the program, then one "t" command may execute multiple instructions.

D. The "ASSUME" statement is used to establish an association between a segment and a segment register. This association is handled by the compiler and determined during compilation. The "ASSUME" statement tells the compiler how to associate the segment with the segment registers in order to correctly generate instructions. Therefore, the correct statement is that the association between the segment and the segment register established by "ASSUME" is handled by the compiler.

  1. After executing the following command, the correct result is ( ).

mov al, 198

and  al, 01010011B

or  al,01010101B

A.al = 57 B.al = 57H C.al = 42 D.al = 42H

After executing the following command, the correct result is B. al = 57H.

explain:

First, execute the "mov al, 198" instruction to move the decimal number 198 (11000110B) into the register AL. At this time, the value of AL is 11000110B, that is, C6H.

Next, execute the "and al, 01010011B" instruction to perform a bitwise AND operation on the value in AL and 01010011B. The bitwise AND operation will AND the bits on the corresponding bits of the two operands, and the result is 01000010B, which is 42H.

Finally, execute the "or al, 01010101B" instruction to perform a bitwise OR operation on the value in AL and 01000010B. The bitwise OR operation will OR the bits on the corresponding bits of the two operands, and the result is 01010111B, which is 57H.

Therefore, after executing these three instructions, the value of AL is 57H.

The correct result is B. al = 57H.

  1. The instruction that needs to use DS is ( ).

A. mov ax,[bp]    B. inc word ptr [bx]     C. add al,cl     D. and [bp],al

The instruction that needs to use DS is A. mov ax,[bp].

explain:

In assembly language, use DS (data segment register) to specify the data segment to be accessed. The square brackets in instruction A. mov ax,[bp] indicate that a memory address is to be accessed, not the contents of a register. In this case, the memory address accessed is obtained by adding the value in BP (Base Pointer Register) to DS. Therefore, this instruction requires the use of DS.

Instruction B. inc word ptr [bx] increments the word (16-bit data) pointed to by the memory address in the BX register, without involving DS.

Instruction C. add al, cl is to add the values ​​in AL register and CL register without involving memory access and DS.

Instruction D. and [bp],al performs bitwise AND operation on the value of the AL register and the word (8-bit data) pointed to by the memory address in the BP register, and does not involve DS.

Therefore, the instruction that needs to use DS is A. mov ax,[bp].

The meaning of the instruction mov ax, [bp]is to read the word (16-bit data) in the stack segment (SS) relative to the memory address pointed by the base pointer (BP) into the register AX.

For this instruction, there are two segment registers involved:

  1. Stack Segment Register (SS): This register stores the segment address of the current stack segment. Through it, we can access data on the stack.

  2. Data Segment Register (DS): When using BP as the base pointer, DS is associated with SS by default. Therefore, in the instruction mov ax, [bp], the value of the data segment register DS is the same as the value of the stack segment register SS.

Therefore, mov ax, [bp]the instruction uses the data segment register DS and the stack segment register SS. It reads a word (16-bit data) from the memory address pointed to relative to the base pointer and stores it into register AX.

  1. data segment

dd  1234h

data ends

The data 1234h in the data section is stored in ( ).

A. 12 34 00 00    B. 34 12 00 00     C. 00 00 12 34      D. 00 00 34 12

The storage condition of the data 1234h in the data section in the memory is B. 34 12 00 00.

In the x86 architecture, data is stored in units of bytes and uses Little Endian (Little Endian). Therefore, for a 16-bit data 1234h, it is stored in the memory in the order of low byte first and high byte last.

Corresponding to data 1234h, its storage situation is:

Low byte: 34 High byte: 12

Due to the little-endian byte order, the low byte 34 is located at a lower memory address, and the high byte 12 is located at a higher memory address. The remaining bytes are 00 00.

Therefore, the storage condition of data 1234h in memory is 34 12 00 00, option B. 34 12 00 00 is correct.

  1. The BIOS is stored in which of the following hardware? ( )

A.RAM   B.ROM    C.CPU    D.CMOS

BIOS (Basic Input/Output System) is stored in B. ROM (Read Only Memory).

BIOS is the basic firmware of the computer system, which provides the functions of computer startup and hardware initialization. It contains low-level software and drivers for the operating system and applications. The BIOS is usually stored in a ROM chip on the computer motherboard. This ROM chip is called a BIOS chip or a hardened BIOS (Firmware BIOS).

Option A. RAM (random access memory) refers to the computer's main memory, which is used to temporarily store programs and data. BIOS is not stored in RAM.

Option C. The CPU (Central Processing Unit) is the main computing and control unit of the computer and is not used to store the BIOS.

Option D. CMOS (Complementary Metal Oxide Semiconductor) is a special type of RAM used to store basic settings and configuration information for a computer. It usually contains BIOS setting information, but does not store the complete BIOS program. Therefore, CMOS is not the primary location for BIOS storage.

Therefore, the correct answer is B. ROM.

  1. When using [di], [bp] to access memory, the default segment registers of 8086CPU are ( ).

A.ds、es     B.ds、ss   C.ss、ds   D.es、ss

In 8086 CPU, when using `[di]` and `[bp]` to access memory, the default segment registers are B. ds (data segment register) and D. ss (stack segment register).

- `[di]` uses DI (destination index register) as the base address pointer, and uses DS (data segment register) as the segment address by default, which is used to access the memory at the offset address specified by the DI register in the data segment.

- `[bp]` uses BP (base pointer register) as the base address pointer, and uses SS (stack segment register) as the segment address by default, which is used to access the memory at the offset address specified by the BP register in the stack segment.

Therefore, the default segment registers of the 8086 CPU are B. ds and ss in turn.

  1. After the debug loads the .exe file, what does the value in cx mean before the value in the register is changed? ( )

A. The number of loops B. The number of bytes of the loaded file.

C. It is the default value of the system, which has no practical significance. D. The length of the program.

After Debug loads the .exe file, before changing the value in the register, the value in CX usually represents the number of cycles (A. cycle number).

The CX register is used as a counter register in many assembly languages ​​and is often used to implement loop control structures. In some instructions, the value of the CX register is used to specify the number of iterations of the loop. After loading the .exe file in Debug, if the value of the CX register is not modified before executing the program, its initial value usually represents the number of loops.

Therefore, the correct answer is A. The number of loops.

  1. Check the memory in debug, the display is as follows:

073F:0000 CD 20 3E A7 00 EA FD FF-AD DE 4F 03 A3 01 8A 03

073F:0010 A3 01 17 03 A3 01 92 01-01 01 01 00 02 FF FF FF

073FH: The font data at 0013H is ( ).

A.007AH      B.03A3H    C.A303H      D.0317H

 C

  1. For 8086CPU, the correct instruction is ( ).

A.mov ax,[bp+dx]        B.mov ax,ds.[bp+bx] 

C.mov ax,ss:[si][di] D.mov ax,cs.6[si]

 In the 8086 CPU, the correct instruction is A. mov ax,[bp+dx]. This instruction uses base pointer BP and index pointer DX for memory access. It will read a word (16 bits) from [BP + DX]the memory location pointed to by and load its value into the AX register.

  1. The instruction that can modify CX is ( ).

A.jmp   B.div   C.shl   D.jcxz

 C

instruction divto perform an unsigned division operation. It divides a dividend with the divisor in a register and stores the quotient in the corresponding register. The syntax is as follows:

div divisor

where divisoris the divisor, which can be a register or memory operand.

When the instruction is executed, the dividend is regarded as a double word (32 bits) or word (16 bits). The high bit of the dividend is in the DX register, and the low bit is in the AX register. The divisor is divided by the contents of the AX register, the quotient is stored in the AL (or AX) register, and the remainder is stored in the AH (or DX) register.

shlThe instruction shifts the binary representation of the destination operand to the left by the specified number of bits and pads it with zeros on the right. The bit shifted out is stored in the carry flag CF.

  1. Regarding the label, the wrong statement is ( ).

A. The data label indicates the address and length of the memory unit.

B. The address label with ":" behind it can only be used in the code segment.

C. Use assume to link the segment where the data label in the instruction is located with a segment register, so that the instruction using the data label can get the segment address of the data label used from the segment register.

D. A set of labels can be stored in a direct addressing table.

It is wrong to say that D. A set of labels can be stored in a direct addressing table.

Direct Addressing Table (Direct Addressing Table) is not used to store the data structure of the set of labels. Direct addressing table is an addressing method used to directly access data in memory according to a given address. It is commonly used for accessing data structures like arrays or tables, where addresses are used as indexes to get data at specific locations.

A label is a symbol used to identify a code or data location in assembly language. They are often used with instructions or data definitions to indicate the flow of a program or the location of data.

Therefore, option D is wrong, because the meaning and purpose of the direct address table and the label are different.

  1. Regarding the PSP, the wrong statement is ( ).

A. This program sets (CS)*16+(IP)=the first address of the memory space where the PSP is located.

assume cs:code

code segment

start:         mov ax,0

       mov es,ax

       mov word ptr es:[200h],0

       mov es:[202h],ds

       jmp dword ptr es:[200h]

code ends

end start

B. PSP has a total of 256 bytes.

C.DOS communicates with the programs it loads through the PSP.

D. After using debug to load a program whose function is to set (ds)=(cs), use a command to write and use T command to run the following program segment:

mov ax,ds

sub ax,10

mov ds,ax

Then use "d ds: 0 ff" to view the memory space where the PSP is located.

D. After using debug to load a program whose function is to set (ds)=(cs), use a command to write and use T command to run the following program segment:

mov ax,ds

sub ax,10

mov ds,ax

Then use "d ds: 0 ff" to view the memory space where the PSP is located.

This statement is wrong. In the given code segment, the value of the ds register is modified to ds-10 instead of setting ds equal to cs. Therefore, using the "d ds:0 ff" command to view the memory space where the PSP is located will not display the correct result.

  1. After the following instructions are executed, the value of ax is ( ).

mov ax,6776h

add al, 90 h

add ah,90h

A.6806H    B.F806H     C.F706H       D.6706H

C does not carry

  1. What is the value of al after the following instruction is executed? ( )

mov al,01100011b

and al,00111011b

or al,00111011b

A.00100011B B.00111011B C.01111011B D. The first three options are all wrong.

 B

  1. When the following program is running, among the instructions of the source program, which is the first instruction executed by the CPU? ( )

assume cs:a

codesg segment

mov ax,20h

mov ax,4c00h

int 21h

codesg ends

a segment

mov bx,30h

mov ax,4c00h

int 21h

a ends

b segment

mov bx,40h

mov ax,4c00h

int 21h

b ends

end

A.mov ax,20h B.mov bx,30h C.mov bx,40h D. None of the above options are correct

 B

According to a given program, the "a segment" part is executed first. In the first instruction of the section, the value in the bx register is set to 30h. Therefore, the first instruction executed by the CPU is mov bx,30h

  1. For 8086CPU, the correct instruction is ( ).

A.inc word ptr ds:[0]           B.mov es:[0],ds:[0]

C.mov ax,[bx+bp]                 D.add Cs,ax

 b

  1. Arranged in order of addresses from low to high, how is the double word data 16 stored in the memory? ( )

A.00 00 10 00        B.00 00 00 10

C.00 10 00 00        D.10 00 00 00

  1. What cannot appear in an executable file is ( ).

A. Machine code B. Pseudo-instruction C. Data defined in source program D. Address in jmp instruction

  1. Regarding the use of memory space in the program, the incorrect statement is ( ).

A. A safe memory space can be allocated to the program by defining a segment

B. DOS and applications generally do not use the space of 0.200~0.2ff

C. Using a safe memory space will not affect the operation of the dos operating system and other legal programs

D. When using the mov instruction, there is no need to worry about damaging system data

  1. Among the following instructions, the instructions that can be executed by the CPU are ( ).

A.SEGMENT      B.ASSUME      C.sti        D.end

  1. What does the CPU actually read when it reads instructions? ( )

A. Strings corresponding to pseudo-instructions and assembly instructions

B. Information in a source program written in assembly language

C. Information composed of a series of binary bits

D. The string corresponding to the assembly instruction

  1. For 8086CPU, the wrong instruction is ( ).

A.mov ax,ds       B.push [bx]         C.inc [bx]         D.add bp,2

  1. For 8086CPU, the following statements about segments are wrong ( ).

A. The starting address of a segment must be an integer multiple of 16

B. Define a segment in the source program. When running the program, the CPU will not know the size of this segment because of the definition.

C. A piece of memory space can be both a code segment and a data segment.

D. The CPU uses a segment as a stack because the assume instruction associates it with the SS register

  1. ( ) has the same function as "mov al,'d'".

A.mov ax,'d' B.mov al,'a'+3 C.mov al,'A'+3 D.or al,'d'

  1. Regarding the instructions in assembly language, the correct statement is ( ).

A. Labels in assembly language are pseudo-instructions

B. Assembly instructions must have corresponding machine codes

C. Pseudo-instructions are recognized by the compiler, and the compiler converts them into corresponding machine codes

D. "+" is generally compiled into an add command

  1. When the following program is running, after "sub ax,masm" is executed, the value of ax is ( ).

assume cs:code

masm segment

dw 5 dup('a','b','c')

masm ends

code segment

start: mov ax,code

          sub ax,masm

          mov ax,4c00h

          int 21h

code ends

end start

A.15       B.1       C.2      D.3

  1. Regarding the use of debug, the wrong statement is ( ).

A. After Debug loads the program into memory, before executing any commands, the value of IP must be zero

B. You can view the value of some bits of the flag register through debug

C. After Debug loads the program into the memory, before executing any commands, the value of CX may be 1024

The DT command has the potential to execute more than one instruction at a time

  1. Regarding the label, which of the following statements is correct is ( ).
  1. Both address labels and data labels can be used after jmp
  2. The label followed by ":" is an address label used in the code segment, and a data label used in the data segment
  3. The data labels used in the code segment only indicate the address of the memory unit
  4. Address labels are not available in the and and or instructions
  5. The first few options are wrong

  1. Which element is not included in assembly language? ( )

A. Assembly instructions     

B. Machine Directive     

C. Directives       

D. "+", "-", "*", "/" and other symbols

  1. For compiling, linking and running, the wrong statement is (    ).

A. The directive is executed by the compiler during compilation

B. Compile with masm compiler, only object files can be generated

C. Executable files contain program and description information

D. The command program provided by DOS can load the program in the executable file into the memory

  1. Which of the following statements is wrong ( ).

    A. In the source program of assembly language compiled with masm.exe, both end and ends are pseudo-instructions

    B. Debug a program in debug, execute "mov ax,4c00h" and

After the two instructions of "int 21h", "Program terminated normally" is displayed on the screen, which can explain this

When the program has returned to DOS

    C. The relevant instructions for program return are executed by the CPU

    D. For program return, DOS provides the corresponding interrupt routine

  1. Write a few instructions with debug:

mov ax,20

mov ds,ax

mov ax,[1]

    After checking the memory, the display is as follows:

0:200  80 00 70 00 60 00 ……

Then use the t command to execute these instructions. After "mov ax, [1]" is executed, what is the value of AX? ( )

    A.7000H     B.0070H     C.1         D.0080H

  1. After the following instruction is executed, what is the value of AX? ( )

mov ax,20

mov es,ax

mov byte ptr es:[0],80h

mov byte ptr es:[1],00h

mov byte ptr es:[2],70h

mov byte ptr es:[3],00h

    mov ax,es:[1]

    A.7000H         B.0070H         C.1         D.0080H

  1. Instructions such as "dw", "db", and "dd" in the assembly language source program belong to ( ).

    A. Assembly instructions B. Pseudo-instructions C. Machine instructions D. Labels

  1. For the execution process of the program, the wrong statement is ( ).

    A. After the program is loaded into the memory through the command, the command will set CS.IP to point to the first command to be executed according to the description information in the executable file

    B. After loading the program into the memory through debug, use the r command to view the value of CX, and you can see the information related to the length of the program

    C. After the program is loaded into memory through debug, DS points to the data segment of the program, and CS points to the code segment of the program

    D. Use the end command in the source program to determine the value of the IP register after the program is loaded

  1. In the following description of the program segment prefix (PSP), the wrong one is ( ).

A. PSP occupies 256 bytes of address space

B. DOS communicates with the loaded program through PSP

C. After loading the program into the memory with debug, the segment address of the PSP and the code segment are consistent, and the offset address differs by 100h

D. After loading the program into the memory with debug, you can use "d ds: 0 ff" to view all the contents of the PSP

  1. The instructions in the following assembly language source program can be compiled ( ).

A. mov al,2000   B. push [0]   C. add al,100h   D. mov dx,1000h

  1. Which of the following statements is correct ( ).

A. Push and pop instructions manipulate the data in the stack by modifying the value of ss:sp

B. When the stack is empty, ss:sp points to the bottom of the stack

C. After the stack is full, if you continue to push data into it, it will overwrite the high-address memory unit after the top of the stack

D. After the stack is full, if you continue to push data into it, it may not necessarily overwrite the memory unit whose address is lower than the address at the top of the stack

  1. The instruction to transfer the data in the memory is ( ).

A. pop ax   B. mov ax,bx   C. mov ax,0   D. in al,20h

  1. After the following program is loaded, before execution, (ds)=0a21h. Regarding the relationship between the register and the program at this time, the wrong statement is ( ).

assume cs:code,ds:data

   data segment

    db ’1975’

   data ends

code segment

dw 0123h,0456h,0789h,0abch,0defh,0fedh,0cbah

mov ax,0

mov bx,0

mov cx,8

s: add ax,cs:[bx]

add bx,2

loop s

    mov ax,4c00h

    int 21h

code ends

end

A. The starting segment address of the program is 0a31h

B. (cs)=0a31h,(ip)=0

C. The value of ds is not the segment address of the data segment

D. The memory address of the machine code of "mov ax,0" is 0a31H:0020H

  1. The default bases of masm and debug are ( ) respectively.

A. Hexadecimal and decimal B. Decimal and binary

C. Decimal and hexadecimal D. Binary and hexadecimal

  1. Complete this program so that after execution, (bx)=3. ( )

mov bx,1

mov cx,___

loop s1

mov bx,2

s1: inc bx

A. 0     B. 1    C. 2    D. 3

Chapter 7-8 (Addressing Modes)

  1. Among the following addressing modes, the relative base indexed addressing is ( ).

A. [bx+si+idata] B. [bx+di] C. [bp+si] D. [bx]

  1. It can be used as an offset address register in base indexed addressing or register indirect addressing ( ).

A. ax,bx,cx,dx       B. ds,es,cs,ss

C. sp,bp,ip,bx D. si,di,bp,bx

  1. The data described by "dd 5 dup (1,2,3,4)" occupies ( ) bytes in total when the program is running.

A. 4    B. 20    C. 40    D. 80

  1. For 8086CPU, the wrong instruction is ( ).

A. move ax,[bp+si] B. move ax,[bx] C. move ax,2[si] D. move al,[dx]

  1. The following addressing modes belong to base address indexed addressing ( ).

A. [of] B. [bx+date] C. [bx+di] D. [bp+di+date]

  1.  The addressing mode adopted by "mov word ptr [bx+si],1" is ( ).

A. Register indirect addressing B. Register relative addressing C. Base indexed addressing D. Relative base indexed addressing

  1. Use the div instruction to carry out the division operation. When the divisor is 16 bits, the remainder is stored in ( ).

A.AX     B.AH   C.AL     D.DX

  1. Regarding the div instruction, the wrong statement is ( ).

A. Executing the div instruction may trigger an interrupt

The divisor of the B.div instruction can be either 16 bits or 8 bits

The dividend of the C.div instruction is either stored in DX and AX, or stored in AX

The operation result of the D.div instruction has two parts: quotient and remainder

  1. If AX=1000H, CL=90H, after executing instruction DIV CL, AX=( ).

A.401CH       B.001CH      C.0040H      D.1C40H

  1. The following statement about the div instruction of 8086CPU is wrong ( ).

A. The dividend can be placed in a register or in a memory unit.

B. If the quotient of the result is greater than the maximum value that al or ax can store, a division overflow error inside the CPU will be triggered.

C. The No. 0 interrupt handler can be rewritten so that the program can handle the division overflow situation.

D. You can use the div command to write a subroutine to calculate the 32-bit dividend/8-bit divisor.

  1. After executing the following instructions, the value of AX is ( ).

mov al, 96 h                                                              

mov bl,12h

mul bl

A. 1152h        B. 0a8ch

C. 0a82h         D. 0f88ch

  1. After the following instruction is executed, what is the value of AX? ( )

mov ha,1

mov al,10h

    mov bl,2

    mul bl

    A.0220H     B.2000H     C.0020H     D.0120H

  1. The following instructions ( ) can be implemented, and the lowest 3 bits in the AX register are cleared to 0

A、 OR   AX,0FFF8H

B、 AND  AX,0FFF8H

C、 AND  AX,0FFF7H

D、 AND  AX,0FFFBH

  1. The following instructions ( ) can be implemented, setting the D3 and D7 bits in the AX register to 1

A、 XOR   AX,08H

B、 OR  AX,08H

C、 OR  AX,88H

D、 XOR  AX,88H

  1. The following instructions ( ) can be implemented, inverting the highest 3 bits in the AX register

A、 NOT  AX

B、 AND  AX,1FFFH

C、 XOR   AX,0E000H

D、 OR    AX,0E000H

  1. The data section has the following definitions

   X1  DB  1,2,3,4,5,6,7,8

   X2 DW 1,2,3,4,5,6,7,8

The error in the following instruction is ( )

A、MOV X1,100

B、 MOV    AX,X1

C、 MOV  AX,X2

D、 MOV  X2,100

  1. The data section has the following definitions

   X1  DB  1,2,3,4,5,6,7,8

   X2 DW 1,2,3,4,5,6,7,8

Which of the following instructions is correct ( )

A、MOV X1,1000

B、 MOV    AX,X1

C、 MOV  AH,X2

D、 MOV  X2,1000

  1. The data section has the following definitions

   X1  DB  1,2,3,4,5,6,7,8,9,10

   X2 DW 100

After executing the following program segment, the value of DX is ( ).

      MOV   CX,10

      MOV   DX,X2

S:   MOV   BX,CX

      MOV AL,X1[BX]

      MOV AH,0

      ADD   DX,AX

      DEC    CX

      LOOP   S

A、 124     B、 224     C、 155     D、 255

  1. The following instruction sequence cannot realize the function of sending the byte data in the memory address 0:202h to al. ______

A、 mov ax,0 

mov ds,ax 

mov bx,202h 

mov al,[bx]

B、 mov ax,0 

mov ds,ax 

mov bp,202h 

mov al,[bp]

C、 mov ax,0 

mov ds,ax 

mov bx,200h 

mov al,[bx+2]

D、 mov ax,0 

mov ds,ax 

mov bp,200h 

mov al,ds:[bp+2]

  1. Among the following instructions, the correct one is ( )

A、 MOV  AX,[BX+BP]        B、MOV  AX,[BX+SI]

C、 MOV AL,[B+DI] D、 MOV AL,[B+DX]

  1. In the following instructions, the error is ( )

A、 MOV AX,[BX+SI] B、 MOV AX,[BX+DI]

C、 MOV AL,[B+DI] D、 MOV AL,[B+BP]

  1. Among the following instructions, the correct one is ( )

A、 MOV  DS:[BP+BX],AH         B、 ADD   [BX],100

C、 MOV [SI],AL D、 MOV [SI],100

  1. In the following instructions , the error is ( )

A、 MOV  DS:[BP+SI],AH         B、ADD   WORD PTR [BX],100

C、 MOV [SI],AL D、 MOV [SI],100

  1. Which of the following program segments can realize the conversion of 987*6? ( )

A、 MOV   AX,987

MOV  BX,6

MUL   AX,BX

  1. MOV   AX,987

MOV  BX,6

MUL BX

C、 MOV   AX,987

MOV  BL,6

MUL BL

D、MOV AL,6

MOV  BX,987

MUL BX

  1. Which of the following program segments can achieve 987/30? ( )

A、 MOV   AX,987

MOV  BX,30

DIV BX

  1. MOV   DX,987

MOV  BL,30

DIV   BL

  1. MOV   AX,987

MOV  BL,30

DIV   BL

D. None of the above options are correct

  1. Execute the following program segment

MOV   AX,87

MOV  BX,6

MUL BX

 Go to ( ) register to view the result

A, AX B, BX C, DX D, DX store the result in the upper 16 bits, AX store the result in the lower 16 bits

  1. Execute the following program segment

MOV   AX,87

MOV  BL,6

MUL BL

 Go to ( ) register to view the result

A、 AX

B、 BX

C、AL

D. The high 16 bits of the stored result in DX, and the low 16 bits of the stored result in AX

  1. The data section has the following definitions:

  DATA1  DB   1,2,3,4

               DB   5,6,7,8

               DB   9,10,11,12

               DB   1,2,3,4

Execute the following program segment

      MOV   BX,0

      MOV SI,0

      MOV  CX,4

      MOV AL,0

S:   ADD   AL,DATA1[BX][SI]

      INC YES

      ADD   BX,4

     LOOP   S

 The result of the AL register is ( )

A、 10      B、 16      C、 24      D、 22

  1. The data section has the following definitions:

  DATA1  DB   1,2,3,4

               DB   5,6,7,8

               DB   9,10,11,12

               DB   1,2,3,4

Execute the following program segment

      MOV   BX,0

      MOV SI,0

      MOV  CX,4

      MOV AL,0

S:   ADD   AL,DATA1[BX][SI]

      INC YES

      INC  BX

     LOOP   S

 The result of the AL register is ( )

A、 10      B、 16      C、 24      D、 22

  1. The data section has the following definitions:

  DATA1  DB   1,2,3,4

               DB   5,6,7,8

               DB   9,10,11,12

               DB   1,2,3,4

Execute the following program segment

      MOV   BX,0

      MOV SI,0

      MOV  CX,4

      MOV AL,0

S:   ADD   AL,DATA1[BX+SI]

      ADD   AL,DATA1[BX+4+SI]

      INC YES

       LOOP   S

 The result of the AL register is ( )

A、 10      B、 16      C、 52      D、 36

  1. There are the following definitions, the statement is correct ( ).

  X DW 5 DUP (1,2,3)

A. A total of 15 bytes are defined B. A total of 3 bytes are defined

C. A total of 5 bytes are defined D. A total of 30 bytes are defined

  1. There are the following definitions, the statement is correct ( ).

  X  DB    3   DUP  (1,2 DUP(3))

A. Equivalent to X DB 1, 2, 3

B. Equivalent to X DB 1, 2, 3, 1, 2, 3, 1, 2, 3

C. Equivalent to X DB 1, 3, 3, 1, 3, 3, 1, 3, 3

D. Equivalent to X DB 1, 2, 2, 1, 2, 2, 1, 2, 2

  1. There are the following definitions, the statement is correct ( ).

  X DW 5 DUP (1.3 dup(2))

A. A total of 10 bytes are defined B. A total of 20 bytes are defined

C. A total of 30 bytes are defined D. A total of 40 bytes are defined

Chapters 9-10

  1. When the CPU executes the "call label", it is equivalent to executing ( ).

A. push IP; jmp far ptr label

B.   push CS ; push  IP ; jmp far ptr 标号 

C. push IP; jmp near ptr label

D. push CS; push IP; jmp near ptr label

  1. Using call and ret instructions, we can achieve modular design in assembly language programming. The error in the following description is ( ).
        A. Multiple subroutines can be implemented with call and ret instructions. 
         B. A complex problem can be solved by multiple interrelated subroutines with independent functions. 
         C. For common subroutines, it is best to add detailed comments. 
         D. Use assembly language for programming, and subroutines must be implemented with call and ret.
  2. After the following program is executed, the value of AX is ( ).

mov ax,4

    call s

    nop

S:

    mov ax,offset s

    mov bp,sp

    sub ax,[bp]

A.0       B.1      C.2       D.3

  1. For the jmp instruction that jumps based on displacement, when is the displacement of the jump calculated? ( )

A. compile B. link C. run D. compile or run

  1. The command to modify cs and ip is ( ).

A. jmp ax   B. jmp far ptr s   C. loop   D. ret

  1. "jmp word ptr [bx]" is ( ).
  1. Intra-segment near transfer B. Inter-segment near transfer C. Intra-segment short transfer D. Inter-segment short transfer
  1. "jmp word ptr [bx]" modifies the register ( ).

A.IP    B. BP   C.CS    D.CS和IP

  1. Which instruction can have a different jump range than the other three? ( )

A.jmp      B.jcxz      C.loop      D.je

  1. Which of the following statements is correct ( ).
  1. The iret instruction can be described as:

pop

    pop cs

    pop ip

  1. mov al,1

add al,0ffh

After the above two instructions are executed, (AX)=0

  1. When debugging with debug, use the p command to execute multiple assembly instructions at a time
  2. The call instruction cannot jump by displacement
  1. Regarding the loop instruction, the wrong statement is ().

A. The jump range of the loop instruction is -128~127

B. When CX=10, execute the loop command, and the value of IP must decrease

When C.CX=0, after executing the loop command, CX=0ffffh

When D.CX=1, the loop command is executed, and the value of IP remains unchanged

  1. Assuming sp=0010h, which instruction is executed, and the value of sp will decrease? ( )

A.iret B.jmp label C.retf D.call label

  1. In debug, check the memory with "d 1000:0", the display is as follows.

1000:0000 69 76 65 20 25 63 20 61-6E 64 20 70 72 65 73 73

1000:0010 20 3C 45 4E 54 45 52 3E-0A 00 6B 00 41 62 6F 75

1000:0020 74 20 74 6F 20 67 65 6E-65 72 61 74 65 20 2E 45

Then, write and execute the following command:

mov ax,1000

mov ds,ax

jmp far [2]

After that, the values ​​of cs:ip are ( ) in sequence.

A.6325:2065    B.6520:2563    C.2065:7669       D.6520:2567

  1. Regarding the transfer instruction, the wrong statement is ( ).

A. When performing an intra-segment short transfer, there is no transfer destination address in the machine code corresponding to the jmp instruction.

B. When transferring between segments, the machine code corresponding to the jmp instruction has the destination address of the transfer.

C. When performing intra-segment short transfer, the modification range of IP is 0~255.

The D.loop instruction is also a transfer instruction.

  1. Read, execute which instruction CPU will modify IP twice? ( )

A.push     B.pushf     C.ret       D.mov

  1. Execute the following instructions with the t command in debug, and the observable phenomenon is ( ).

memory address assembly instruction

    076e:0     mov ax,5

    076e:3     call ax

    076e:5     inc ax

    076e:6     mov bp,sp

    076e:8     jmp word ptr [bp]

    A. Loop execution mov ax,5 and call ax

B. Loop execution call ax to jmp word ptr [bp]

C. Loop inc ax to jmp word ptr [bp]

D.ss: The data pointed to by bp is unknown, so it jumps to an unknown memory, and the result is unpredictable

  1. Use the debug d command to check the memory, the results are as follows, after the following instructions are executed, the values ​​of CS and IP are ( ).
        1000: 0010 63 69 66 69 65 73 20 61...
        mov ax, 1000H
        mov es, ax
        jmp dword ptr es: [0012H]

A.6669  6573     B.6966  6965     C.7365  6966    D.1000  0012

  1. Complete the program with an instruction that allows the program to return. ( )

assume cs:code

data segment

    dd 4 dup (0)

data ends

code segment

s:

mov ax,4c00h

    int 21h

code ends

assume cs:a

a segment

start:

      _____________

a ends

end start

A.jmp s       B.loop s     C.jmp far ptr s       D.jmp near ptr s

  1. After reading and executing the following instructions, how many times has the CPU modified the IP value in total? ( )

sub ax,ax

correct

A.1      B.2      C.3       D.4

  1. The process of 8086CPU reading and executing instructions is ( ).

① Read instructions from the memory space pointed to by CS: IP, and put the instructions into the instruction buffer

② Execute the command and go to step ①

③IP points to the next instruction

A.① ②   

B.① ③ ②

C. If the instruction is a transfer instruction, the process is ① ③ ②, if not, the process is ① ②

D. If the instruction is a transfer instruction, the process is ① ②, if not, the process is ① ③ ②

  1. has the following definition

DATA SEGMENT 

  X1  DB  5 DUP (1,2,3)

  X2 DW 1

  X3  DW  1000H

DATA  ENDS

After executing the following program segment, the value of CX is ( )

   MOV   AX,DATA

   MOV   DS,AX

   MOV   CX,OFFSET  X3

A、 15

B、 16

C、 17

D、 18

Check the memory with Debug, the results are as follows:

2000:1000 04 05 60 BE 00 06 00 00 00 ……

At this time, the CPU executes the instruction:

mov ax,2000H

mov es,ax

jmp dword ptr es:[1002H]

After that, the correct statement is ( )

A、 (CS)=2000H,(IP)=1002h

B、 (CS)=BE60H,(IP)=0600H

C、 (CS)=60BEH,(IP)=0006H

D、 (CS)=0600H,(IP)=BE60H

  1. has the following definition

DATA SEGMENT 

  X1  DB  5 DUP (1,2,3)

  X2 DW 1

  X3  DW  1000H

DATA  ENDS

After executing the following program segment, the value of CX is ( )

   MOV   AX,DATA

   MOV   DS,AX

   MOV   BX,OFFSET  X3

   MOV   CX,[BX]

A、 18

B、 17

C、 1

D、 1000H

  1. Regarding the label of the command JMP SHORT, the correct statement is

A. Execute this command and modify CS and IP once

B. Execute this command and modify the IP once

C. Execute the command and modify the IP twice

D. Execute the command and modify the IP three times

  1. Regarding the label of the command JMP SHORT, the correct statement is

A. Execute the instruction, (IP) = (IP) + 8-bit displacement

B. Execute the instruction, (IP) = (IP) + 16-bit displacement

C. Execute the instruction, (IP) = (IP) + offset address in the segment where the label is located

D. Execute the instruction, (IP) = the offset address in the segment where the label is located

  1. Regarding the label of the instruction JMP NEAR PTR, the correct statement is

A. Execute the instruction, (IP) = (IP) + 8-bit displacement

B. Execute the instruction, (IP) = (IP) + 16-bit displacement

C. Execute the instruction, (IP) = (IP) + offset address in the segment where the label is located

D. Execute the instruction, (IP) = the offset address in the segment where the label is located

  1. Regarding the label of the instruction JMP FAR PTR, the correct statement is

A. Execute the instruction, (IP) = (IP) + 8-bit displacement

B. Execute the instruction, (IP) = (IP) + 16-bit displacement

C. Execute the instruction, (IP) = (IP) + offset address in the segment where the label is located

D. Execute the instruction, (IP) = the offset address in the segment where the label is located

  1. Among the following instructions, the one that does not modify CS is ( )

A、 JMP   AX

B、 JMP    FAR  PTR   S1

C、 JMP  DWORD  PTR   DS:[0]

D、 JMP  DWORD  PTR  [BX]

  1. Among the following instructions, the one that modifies CS and IP at the same time is ( )

A、 JMP   AX

B、 JMP    NEAR  PTR   S1

C、 JMP  WORD  PTR   DS:[0]

D、 JMP  DWORD  PTR  [BX]

Chapter 11

  1. After the following instructions are executed, the values ​​of of and cf are ( )

mov ax,0

         push ax

         pop

         mov ax,0ffffh

         inc ax

A. of=0,cf=0    B. of=1,cf=0      C. of=0,cf=1      D. of=1,cf=1

  1. After the following instructions are executed, the values ​​of sf, cf, zf, and of are respectively ( ).

mov ax,0ea04h

sub ax,4ae0h

A. 0,1,0,1    B. 1,1,0,0     C. 1,0,0,0    D. 1,0,1,0

  1. The instruction that can change the value of the flag register is ( ).

A.PUSHF      B.MOV AX,AX         C.SHL AX,CL      D.JCXZ

  1. The instruction that can change the value of SF and ZF is ( ).

A.je next     B.in al,20h     C.puah ax      D.shl ax,1

  1. The instruction that does not affect the value of the flags register is ( ).

A.adc ax,bx      B.cmp cx,ax     C.inc ax       D.jmp word ptr [bx]

  1. The instruction that can make if=1 is ( ).

A.sti     B.cld     C.std     D.shr

  1. mov al, 62 h

add al,63h

After these two instructions are executed, the value of cf\of is ( ).

A. cf=0,of=0  B. cf=0,of=1    C. cf=1,of=0    D. cf=1,of=1

  1. The following description of flags is correct ( ).
    A. You can use stack instructions to change the value of the flag bit
  1. Both Cmp and pushf instructions may affect the value of the flag bit
        C. You can know the size of the two numbers by judging whether the sf bit after the execution of the cmp instruction is 1.
        D. The transfer instruction and shift instruction have no effect on the value of the flag bit
  1. When executing the JNB instruction, ( ), the jump is performed.

A.CF=1 and ZF=1 B.CF=0 or ZF=1 C.CF=0 or ZF=0 D.CF=0

  1. After the following program is executed, the values ​​of pf, sf, cf, and of are respectively ( ).

mov ax,0ff80h

    add al,0f0h

A.pf=1 sf=1 cf=1 of=1       B.pf=0 sf=1 cf=1 of=1

C.pf=0 sf=0 cf=1 of=1       D.pf=1 sf=0 cf=0 of=0

  1. Which of the following statements related to the flag register is wrong ( ).

    A. The flag register can be accessed by stack instructions

    B. When al=0ffh, executing "inc al" will affect the value of cf

    C. Arithmetic operation instructions will not affect the df flag

    D. The conditional transfer instruction that transfers based on the comparison result of the unsigned number detects the value of zf.cf

  1. For the description of the relevant bits of the flag register, the error is ( ).
  1. mov al,1

add al, 127

After these two instructions are executed, OF=1, overflow occurs; although the logical result is positive, SF is 1

  1. mov al,1

add al,0ffh

After these two instructions are executed, OF=0, CF=1

  1.  "inc ax" does not affect the CF bit of the flags register
  2. S:mov ax,8f00h

cmp ax,5

jb s

int 21h

During the execution of this program, SF is always 1

  1. The following instructions must not change the flag register ( ).

A.int 21h B.jmp ax    C.cmp ax,bx    D.sub ax,ax

  1. If AL=75H, after executing ADD AL,0F0H, the values ​​of OF and CF are ( ).

A.OF=1,CF=0      B.OF=0,CF=0    C.OF=0,CF=1       D.OF=1,CF=1

  1. After the instruction in which of the following options is executed, zf=1, pf=1? ( )

A.mov ax,1      B.mov ax,1     C.mov ax,1       D.mov ax,1

add ax,2        and ax,0       sub ax,2          or ax,0

  1. After the instruction in which of the following options is executed, cf=1, of=1? ( )

A.mov al,98 B.mov al,0f0H C.mov al,0f0H D.mov al,68H

add al,99 add al,88H add al,78H add al,1

  1. Regarding the string transfer instruction, the wrong statement is ( ).

A. With only one movsb instruction, the data in one memory unit can be transferred to another memory unit

B. After the movsb instruction is executed, the values ​​of SI and DI may increase or decrease

C. Transmission can be performed in units of bytes or words

D. If the value of CX is 10 before executing "movsb", "movsb" will be repeated 10 times

  1. For the flag register of 8086CPU, the following statements are wrong ( ).

A. The flag register is 16 bits

B. It is impossible to update all bits of the flag register through one assembly instruction

C. Some bits in this register have no meaning

The D.cmp instruction can change the value of the flag register

Chapter 12 and beyond

  1. Stored in the interrupt vector table is ().

A. Interrupt type code B. Entry address of the interrupt handler

C. Interrupt handler D. Breakpoint address

  1. The interrupt vector occupies ( ) bytes.

A. 1           B. 2            C. 3         D. 4

  1. Using call and ret instructions, we can achieve modular design in assembly language programming. The error in the following description is ( ).
          A. Multiple subroutines can be implemented with call and ret instructions. 
             B. A complex problem can be solved through multiple interrelated and functionally independent subroutines. 
             C. For common subroutines, it is best to add detailed comments. 
             D. Use assembly language for programming, and subroutines must be implemented with call and ret.
  2. After the following instructions are executed, the values ​​of al and cf are ( ).

mov al,00000001B

mov cx,109h

shl al, cl

A. 29 ,1     B. 29 ,0     C. 0,1      D. 0,0

  1. Given that (AX)=2, the program segment that can realize (AX)=(AX)*8 is ( ).

A.shl ax,3           B.shr ax,3

C.MOV CL,3           D.mov cl,3

SHL AX,CL             shr ax,cl

  1. Regarding shl and shr, the correct statement is ( ).

A.shl uses 0 to supplement the highest bit.   

B.shr shifts data in a register or memory location to the left.

C. The value of the shifted bit is 0, and shl and shr do not affect CF.

D.shr fills the highest bit with 0.

  1. The program segment whose logic is not to realize (ax)=(ax)*10 is ( ).

A. shl ax,1

mov bx,ax

mov cl,2

shl ax,cl

add ax,bx

B. mov bx,ax

shl ax,1

shl bx,1

shl bx,1

add ax,ax

add ax,bx

C. mov bx,ax

mov cl,3

shl ax,cl

shl bx,1

add ax,bx

D. mov cl,3

shl ax,cl

mov bx,ax

mov cl,2

shr bx,cl

add ax,bx

  1. Now I want to judge whether the value of AL is the power of 2^n (n is a positive integer) of a certain positive integer. If al=10000110b, then at least a few bits need to be shifted, and the result can be judged by the value of cf? ( )

A.1         B.2         C.3         D.4

  1. Stored in the interrupt vector table is ().

A. Interrupt type code B. Breakpoint address C. Interrupt handler D. Entry address of interrupt handler

  1. It is possible to increase the value of ax by 2 times ( ).

A. mul 2     B. mul ax,2     C. shl ax,1    D. shr ax,1

  1. For 8086CPU, the correct instruction is ( ).

A. inc cx,1       B. shl ax,2      C. and [bp],al       D. mov [bx][bp],ax

  1. For using the t command in debug, the correct statement is ( ).

A. Can trigger a single-step interrupt B. Will execute the entire program C. Only one instruction can be executed

D. After executing the two instructions "mov ax,4c00h" and "int 21h" in sequence, the program returns

  1. mov ax,4c00h

int 21h

The function of this program is ( ).

  1. Call function 4c00h of interrupt routine 21h
  2. tells the compiler that the program ends here
  3. back to DOS
  4. None of the first three options are correct
  1. The correct statement is ( ).

    A. This code can be used to read the year information in CMOS

mov al,9

in 70h,al

out al,71h

    B. In the shift instruction, you can use bl to store a shift number greater than 1

    C. Use the shl command to shift al, pay attention to the impact on the value of ah

    D. ASCII code of decimal number = BCD code of decimal number + 30h

E. The address label followed by ":" can be written in all segments

F. The data label can only be written in the data segment

2. Use one instruction to write the functions specified below

  1. Multiply the AL register value by 8.
  2. Truncate the lower 4 bits of the BL register.
  3. Set bit D14 of the CX register to 1 and leave the rest of the bits unchanged.
  4. Use the base index addressing mode of registers BX and SI to add a byte in the memory to the content of the AL register and save it in the AL register.
  5. It is known (AL) = 03H, and the code of the lower 4 bits in AL is reversed by means of the instruction, while the upper 4 bits of the code remain unchanged.
  6. Complete clears AX and clears flag bit CF.
  7. The content of AX is incremented by 1. The requirement does not affect CF.
  8. Send 25H to AL register.
  9. Multiply the AL content by 2.
  10. AL content is multiplied by BL content.
  11. Test whether the lowest bit of AL is 1.
  12. Change the AL content to the corresponding ASCII code
  13. Add a word in the register to the content of the CX register with the register relative addressing mode of BX and displacement 0B2H, and send the result back to the memory.
  14. The value of the AX register is saved on the stack.
  15. Clear the D6 and D2 bits of AL;
  16. Multiply the CX register value by 2.
  17. Decrement 1 from the BL register value.
  18. The content of AX is increased by 1, and the requirement does not affect CF.
  19. Invert bit D4 of the BX register.
  20. Clear the upper 4 bits of the AX register to 0.
  21. Add the number 0A0H to the content of the AL register, and send the result back to AL.

3. Program Analysis

  1. The following program calculates 28, choose a data completion program. ( )

assume cs:code

code segment    

start: mov ax,2

         mov cx,_____

s:   add ax,ax

         loop s

     mov ax,4c00h

    int 21h

code ends

end  start

  1. 8     B. 7     C. 4      D. 128
  1. After the following program is executed, AX=( ).

assume cs:code 

code segment

start: mov ax,2

         mov bx,2

         mov cx,0

s:   add ax,bx

         loop s        

      mov ax,4c00h

    int 21h

code ends

end start

A. 2       B. 4        C. 0FFFEH      D. 0FFFCH

  1. After the following instructions are executed, the content in the 10000H~10006H memory unit is ( ).

mov ax,1000H 
    mov ds,ax 
    mov bx,0000H 
    mov ax,3e88H 
    mov  [bx],ax 
    inc bx 
    inc bx 
    mov [bx],ah 
    mov ah,0 
    inc bx 
    mov [bx],ax 
    inc bx 
    mov [bx],ax
    mov ax,ds:[1] 
    inc bx 
    inc bx 
    mov [bx],ax

A.88H,3eH,3eH,88H,88H,00H,3eH

B.88H,3eH,3eH,88H,00H,88H,00H

C.88H,3eH,3eH,88H,00H,3eH,3eH

D.88H,3eH,3eH,88H,88H,3eH,3eH

  1. Complete the following program, calculate the value of 00101000h-00202000h, and save the high bit of the calculation result in AX, and save the low bit in BX. ( )

    Mov ax,0010h

    Mov bx,1000h

    ___________

    ___________

A.Sub bx,2000h      B.Sbb bx,2000h

Sub ax,0020h         Sub ax,0020

C.Sub bx,2000h      D.Sbb bx,2000h

Sbb ax,0020h        Sbb ax,0020h

  1. Completing the program so that it can realize the sum of all BYTE data in the .SUM=string STR. ( )

ASSUME CS:CODE,ES:DATA

DATA SEGMENT

STR DB 'NULL POINTER ASSIGNMENT.'

DATA ENDS

CODE SEGMENT

      SUM DW 0 

START:MOV AX,DATA

MOV ____,AX

MOV SI,0

MOV CX,24

S:MOV AL,STR[SI]

ADD ____ , AL

ADC BYTE PTR SUM[1],0

LOOP S

       

MOV AX,4C00H

INT 21H  

CODE ENDS

END START     

A.ds,SUM[2]             B.es,SUM[2]

C.es,byte ptr SUM[0]    D.ds,byte ptr SUM[0]

  1. The following program implements. Convert uppercase letters in the data segment to lowercase, and lowercase letters to uppercase. Completion procedure. ( )

ASSUME CS:CODE

DATA SEGMENT

    DB "heLLo"

DATA ENDS

CODE SEGMENT

START:MOV AX,DATA

       MOV DS,AX

       MOV BX,0

   

       MOV CX,5

S:ADD BYTE PTR [BX],00100000B

       AND BYTE PTR [BX],_________

       OR BYTE PTR [BX],01000000B

       INC BX

       LOOP S

       MOV AX,4C00H

       INT 21H

CODE ENDS

END START

A.01h B.00h C.80h D.7fh E. The first few options are incorrect

  1. The following program counts the number of data whose value is in [-64,-16] among the 32 byte integers at 1000:0, and the result is stored in DX. Complete this program. ( )

mov ax,1000h

mov ds,ax

mov bx,0

mov dx,0

mov cx,32

s:mov al,0

________

cmp al,16

________

cmp al,64

________

inc dx

s0: inc bx

loop s

  1. or al,[bx];jmp ax;shr al,1
  2. add al,[bx];jnb s0;jna s0
  3. and al,[bx];is s0;is s
  4. sub al,[bx];jb s0;ja s0

E.None of the previous options are correct.

  1. Complete the program so that it can copy "assembly" to the memory space at 0:200. ( )

    assume cs:code,ds:data

data segment

        db 'assembly'

data ends

code segment

start:

    mov ax,data

    mov ds,ax

    move you___

    mov ax,0

    mov es,ax

    mov by,___

    mov cx,___

    std

    rep movsw

    mov ax,4c00h

    int 21h

code ends

end start

A.6,206h,4         

B.8,208h,4

C.0,200h,8

D.0,200h,4

  1. Complete the program so that (AX)=2^10 can be realized. ( )

       mov ax,2

mov cx,___

    s: add ax,ax

       loop s

    A.8         B.9         C.10              D.11 

  1. After the following program is executed, the value of ax is ( ).

mov ax,0

    push ax

    pop

    mov ax,0fff0h

    add ax,88h

    pushf

    pop ax

    and al,11000101b

    and ah,10001000b

Ref.Flags Register

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

OF

DF

IF

TF

SF

ZF

OF

PF

CF

A. 1h B. 804h C. 5h D. None of the first three options are correct

assume cs:code

stack segment

 db 16 dup(0)

stack ends

code segment

start: mov ax,stack

         mov ss,ax

         mov sp,16

mov ax,sp

push cs

call s

sub ax,sp

s:pop ax

       mov ax,4c00h

         int 21h

code ends

end start

After the program is loaded into the memory, the memory space where a section of the program is located is as follows:

The instruction in the source program corresponding to the memory address machine code

1000:0008  8BC4        mov ax,sp

1000:000A  0E          push cs

1000:000B  E80200      call s

1000:000E  2BC4        sub ax,sp

1000:0010  58        s:pop ax

Execute this program, after "pop ax" is executed, the value of ax is ( ).

A. 8h      B. 0bh    C. 0eh    D. 1000h   E. 2    F. 10h

  1. The following program calculates (345-333)^2, and the result is stored in dx.ax. Complete this program. ( )

assume cs:code

code segment

start: mov ax,333

push ax

mov ax,345

push ax

call calc

mov ax,4c00h

int 21h

calc:  push bp

mov bp,sp

mov ax,_____

sub ax,_____

mov bp,ax

mul bp

pop bp

ret 4

code ends

end start

A.[bp+6],[bp+8]       B.[bp+4],[bp+6]

C.[bp+2],[bp+4]       D.[bp+4],[bp+2]

  1. The following program counts the number of data whose size is (15, 100] among the 32 bytes at 0f123:0, and the result is stored in dx. Complete this program. ( )

mov ax,0f123h

mov ds,ax

mov bx,0

mov dx,0

mov cx,32

s:mov al,[bx]

cmp al,15

_________

cmp al,100

_________

inc dx

s0:inc bx

loop s

A. jna s0,jnb s0 B. ja s0,jb s0

C. jnb s0,jna s0 D. jna s0,ja s0

  1. When the following program is executed until (cx)=0, how many times does the CPU modify the IP? ( )

mov cx,2

s:       mov ax,bx

loop s

A. 3      B. 5        C. 6      D. 7     E. 8     F. 9

  1. Check the memory with debug, the result is as follows.

  2000: 0200 00 01 02 03 04 05 06 07-08 09 0A 0B 0C 0D 0E 0F
2000: 0210 10 11 12 13 14 15 16 17-18 19 1A 1B 1C 1D 1E 1F

After the following program is executed, ax, cx, The contents in dx are ( ) in turn.

mov ax,1fffh

mov ds,ax

mov ss,ax

mov bx,210h

mov sp,bx

mov ax,[bx]

mov cx,[bx+12h]

pop dx
 

A. unknown, unknown, unknown B. 0100h, 1312h, unknown

C.0001h,1213h,1415h         D.0100h,1312h,0100h

  1. Complete the program so that it can be realized. Accumulate 8 data at a, and store the result in the double word at b. ( )

assume cs:code,ds:data

data segment

a dw 1,2,3,4,5,6,7,8

b dd 0

c dw a,b

data ends

code segment

.......

mov ax,4c00h

int 21h

code ends

end start

A. start: mov ax,data

mov ds,ax

mov si,0

mov cx,8

s: mov ax,a[si]

add b[0],ax

adc b[2],ax

add si,2

loop s

B. start: mov si,0

mov cx,8

s: mov ax,a[si]

add word ptr b[0],ax

adc word ptr b[2],0

add si,1

loop s

C. start: mov ax,seg a

mov ds,ax

mov si,0

mov cx,8

s: mov ax,a[si]

mov bx,offset b

          add word ptr[bx],ax

adc word ptr 2[bx],0

add si,2

loop s

D. start: mov ax,data

mov ds,ax

mov si,0

mov cx,8

s: mov ax,a[si]

mov bx,word ptr c[0]

add word ptr [bx],ax

mov bx,word ptr c[2]

adc word ptr[bx],0

add si,2

loop s

  1. Complete the program to make it possible. Convert the character strings in the data section to uppercase. ( )

assume cs:code

data segment

db 'conversation',0

data ends

code segment

start:

mov ax,data

mov ds,ax

mov si,0

mov cx,12

call capital

mov ax,4c00h

int 21h

capital:

......

code ends

end start

A.     or byte ptr [si],00100000b

inc yes

loop capital

ret

B. mov cl,[si]

mov ch,0

jcx ok

sub word ptr [si],20h

inc yes

inc yes

jmp short capital

ok:right

C.     mov cl,11011111b

s: push cx

and  byte ptr [si],cl

inc yes

pop cx

loop s

ok:right

D.     mov cl,[si]

mov ch,0

inc cx

loop ok

ret

ok: and byte ptr [si],11011111b

inc yes

jmp capital

  1. The machine codes of all branch instructions in the following program are two bytes. Complete the program with an instruction so that it can be returned by the program segment in the code segment. ( )

assume cs:code

code segment

   mov ax,4c00h

   int 21h

start:

   nop

   nop

   push cs

   pop ds

   mov si,offset o

mov di,offset start

   mov ax,ds:[si]

   mov ds:[of],ax

   mov cx,-2

   s:

   _____________

   jcxz start

o: loop s

   code ends

end start

A.add cx,2 (machine code: 83H C1H 02H)

B.add cx,1 (machine code: 83H C1H 01H)

C.inc cx (machine code: 41H)

D. None of the above is correct

  1. Check the memory unit with debug, the results are as follows. Then execute the following program, what is the value of ax? ( )

1100:F000 BE 00 06 00 6A 22

        MOV AX,2000H

        MOV DS,AX

        MOV BX,0000H

        MOV SI,0

        MOV AX,2[BX][SI]   

        INC YES

        ADD AX,2[BX][SI]    

        INC YES

        MOV OF,YES

        SUB AX,2[BX][DI]  

   

A.9c06h       B.479ch     C.7006h      D.8c70h

  1. After the following program is executed, what is the value in ax?

memory address machine code assembly instruction

1000:0 b8 00 00 mov ax,0

1000:3 e8 01 00 call s

1000:6 40 inc ax

1000:7 58 s:pop ax

  1. After the following program is executed, what is the value in ax?

memory address machine code assembly instruction

1000:0 b8 00 00 mov ax,0

1000:3 9a 09 00 00 10 call far ptr s

1000:8 40 inc ax

1000:9 58 s:pop ax

add ax,ax

pop bx

add ax,bx

  1. After the following program is executed, what is the value in ax?

memory address machine code assembly instruction

1000:0 b8 06 00 mov ax,6

1000:2 ff d0 call ax

1000:5 40 inc ax

1000:6 mov bp,sp

add ax,[bp]

  1.  The procedure is as follows.

assume cs:code

data segment

data ends

code segment

start: mov ax,data

mov ds,ax

mov bx,0

jmp word ptr [bx+1]

code ends

end start

To make the CS:IP point to the first instruction of the program after the jmp instruction in the program is executed, what data should be defined in the data section?

  1. The procedure is as follows.

assume cs:code,ds:data

data segment

dd 12345678h

data ends

code segment

start: mov ax,data

mov ds,ax

mov bx,0

mov [bx],_______

mov [bx+2],_________

jmp dword ptr ds:[0]

code ends

end start

Complete the program so that after the jmp instruction is executed, CS:IP points to the first instruction of the program.

  1. Check the memory with Debug, the results are as follows:

2000:1000 BE 00 06 00 00 00 ......

At this time, the CPU executes the instruction:

mov ax,2000H

mov es,ax

jmp dword ptr es:[1000H]

After that, (CS)=? , (IP)=?

  1. Complete the program below, count the number of data in [32,128] in the 32 bytes at F000:0.

mov ax,0f000h
mov ds,ax

mov bx,0
mov dx,0
mov cx,32
s:mov al,[bx]
cmp al,32
_________

cmp al,120
__________

inc dx
s0:inc bx
loop s

  1. Complement the following program and count the number of data whose size is (32,128) among the 32 bytes at F000:0.

mov ax,0f000h
mov ds,ax

mov bx,0
mov dx,0
mov cx,32
s:mov al,[bx]
cmp al,32
__________

cmp al,120
___________

inc dx
s0:inc bx
loop s

Experiment 1~Experiment 9

 

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Origin blog.csdn.net/weixin_73961973/article/details/131440538
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