Assembly Language Wang Shuang [Fourth Edition] Chapter 1 Detection Point 1.1

Assembly language Wang Shuang fourth edition after-school test point after-school experiment continues to update

1.1

  1. The addressing capability of 1 CPU is 8KB, then the width of its address bus is 13

  2. 1KB memory has 1024 storage units, and the number of storage units is from 0 to 1023

  3. 1KB memory can store 1024*8=2^13=8192 bits, 1024 Bytes

  4. 1GB is 1024^3 Byte , 1MB is 1024^2 Byte , 1KB is 1024 Byte

  5. The address bus widths of 8080, 8088, 80296, and 80386 are 16, 20, 24, and 32 respectively, so their addressing capabilities are: 2^6=64 (KB), 2^0=1 (MB ), 2^4=16 (MB), 2^2=4 (GB)

A line can have two states, and 16 lines can be converted into 2^16 states

  1. The data bus widths of 8080, 8088, 8086, 80286, and 80386 are 8, 8, 16, 16, and 32 respectively. Then the data they can transmit at one time are: 1 (B), 1 (B), 2 (B), 2 (B), 4 (B)

8 roots can transmit 1Byte at a time, so the first two spaces are 1, 16/8=2, so the latter is 2, and the last 32/8=4

  1. To read 1024 bytes of data from memory, 8086 must read at least 512 times, and 80386 must read at least 256 times
  2. In the memory, data and programs are stored in the form of 01 (binary)

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Origin blog.csdn.net/weixin_45837404/article/details/124126219