End-of-period simulation (supplement)

multiple choice

2-1 (Course objective 2 for this question)
A computer has 16 general-purpose registers, uses 32-bit fixed-length instruction words, and the opcode field (including addressing mode bits) is 8 bits. The source operand and destination operand of the Store instruction Register direct addressing and base addressing are used respectively. If the base address register can use any general-purpose register, and the offset is expressed in complement code, the value range of the offset in the Store instruction is ( ).
A.-32767 ~ +32768
B.-32768 ~ +32767
C.-65535 ~ +65536
D.-65536 ~ +65535

2-2 (Course objective 2 for this question)
A 16K*32-bit SRAM memory chip uses row and column address decoders with the same number of bits inside, so the total number of internal decoding output lines is ( ).
A. $2^7$
B.$2^8$
C.$2^{14}$
D.$2^{16}$

2-3 (Course objective 2 of this question)
A 16K*32-bit SRAM memory chip, the sum of its data lines and address lines is ( ).
A.46
B.48
C.36
D.39

2-4 (Course objective 2 of this question)
In a byte-addressed computer, the first address of a double-type array A is 2000H. Use indexed addressing and loop structure to access array A, and save the initial address of the index register for the array subscript. The value is 0, each loop takes an array element, and its offset address is the index value multiplied by sizeof(double), and the content of the index register is automatically incremented by 1 after fetching. If the address of the element taken by a loop is 2100H, the content of the index register when entering the loop is ( ).
A.25
B.32
C.64
D.100

fill in the blank

4-3 (Course objective 2 for this question)
A computer system adopts 32-bit single-word fixed-length instructions, and has at most 3 address code fields, and the bit width of each address code field is 8 bits. Assuming that there are 254 three-address instructions, 511 double-address instructions, and 245 single-address instructions in the extended opcode instruction system, the instruction system can design at most (3 points) zero-address instructions (just fill in the numbers) 2816.

4-4 (Course objective 2 for this question)
A computer adopts big-endian mode and is addressed by byte. The machine number of the operand in an instruction is 1234FF00H, the operand adopts the base address addressing mode, the formal address (expressed in complement code) is FF12H, and the content of the base address register is F0000000H, then the LSB (least significant word) of the operand Section) where the address is 0x EFFFFF15(4 points) (limited to uppercase letters and Arabic numerals).

4-5 (Course objective 2 of this question)
A computer has a word length of 64 bits, adopts three-address instructions, supports 8 kinds of addressing operations, and completes 112 kinds of operations. Each addressing method can obtain operands within the range of 64K main memory. And can save the operation result in the range of 32K. Then the word length of the computer instruction should be at least 63(3 points) bits; executing an instruction requires at most 4(3 points) access to the main memory (limited to fill in Arabic numerals).

4-6 (Course objective 2 of this question)
It is known that a certain system is shown in the figure below, Setup Time=3ns, Hold Time=3ns, Clk_to_Q=3ns, Adder Delay=5ns. Then the critical path delay of the system is 26(2 minutes) ns, and the maximum Hold Time of the output register is 8(2 minutes) ns.

4-7 (Course objective 2 for this question)
A computer memory is addressed by byte and uses little-endian to store data. Assume that the compiler stipulates that the lengths of int type and short type are 32 bits and 16 bits respectively, and the data is stored by boundary alignment. A C language program segment is as follows:

   struct{
    
     int a; char b; short c; } record; 
   record.a=273; 

If the first address of the record variable is 0xC008, then the content in address 0xC008 is 0x 11(3 points), and the address of record.c is 0x C00E(3 points) (capital letters and Arabic numerals only).

Subjective questions

8-1 [Model exam at the end of the term] Assuming that the elements of an array are stored in the main memory in row-first order, try to analyze programs A and B from the perspective of locality.
(7 points)
(Course objective 3 for this question)
(1) Assume that the elements of an array are stored in the main memory in row-first order, and try to analyze programs A and B from the perspective of locality.
(2) The temporal locality and spatiality of the variable sum.
(3) Temporal locality and spatial locality of instruction access by for loop body.

Solution:
(1) Program A has good spatial locality and no temporal locality;
while program B has poor spatial locality and also does not have temporal locality;
(2) The variable sum is used many times in the loop Therefore, it has good temporal locality.
(3) The instructions in the for loop will be executed repeatedly, so it has good time locality. In addition, the
machine instruction sequence in the loop body is usually executed sequentially, so it also has a certain spatial locality.