Oversampling frequency: To increase the resolution of one bit or reduce the noise by 6dB, it needs to be oversampled by 4 times the sampling frequency fs. Suppose a system uses a 12-bit ADC to output a temperature value (1Hz) per second. In order to The measurement resolution is increased to 16 bits, and the oversampling frequency is calculated as follows:
- fos=4 4*1(Hz)=256(Hz).
1. Classification of AD converters
The following briefly introduces the basic principles and characteristics of several commonly used types: integral type, successive approximation type, parallel comparison type/serial parallel type, sigma_delta modulation type, capacitor array successive comparison type and voltage-frequency conversion type.
1). Integral type
The working principle of the integral type AD is to convert the input voltage into time (pulse width signal) or frequency (pulse frequency), and then obtain the digital value by the timer/counter. Its advantage is that it can obtain high resolution with a simple circuit, and has strong anti-interference ability (why is the anti-interference ability strong? The reason assumes that there is a positive and negative white noise interference to the zero point. Obviously, once integrated, the noise will be filtered out), but the disadvantages Because the conversion accuracy depends on the integration time, the conversion rate is extremely low. Most of the early single-chip AD converters used the integral type, but now the successive comparison type has gradually become the mainstream.
2). Successive comparison SAR
Successive comparison AD is composed of a comparator and DA converter through successive comparison logic. Starting from the MSB, the input voltage is compared with the output of the built-in DA converter sequentially for each bit, and the digital value is output after n times of comparison. Its circuit scale is medium. The advantages are higher speed, lower power consumption, and are cheap at low resolutions (<12 bits), but expensive at high resolutions (>12 bits).
3). Parallel comparison type/serial parallel comparison type
Parallel comparison type AD adopts multiple comparators, and performs conversion only once for comparison, also known as FLash (fast) type. Due to the extremely high conversion rate, n-bit conversion requires 2n-1 comparators, so the circuit scale is also very large, and the price is also high. It is only suitable for high-speed fields such as video AD converters.
The serial-parallel comparison type AD structure is between the parallel type and the successive comparison type. The most typical one is composed of two n/2-bit parallel type AD converters and DA converters. It uses two comparisons to perform conversion, so it is called It is Half flash (half fast) type. There is also a multistep/subrangling type AD that is divided into three or more steps to achieve AD conversion, and it can also be called a pipelined type AD from the perspective of conversion timing. Functions such as performing digital operations on conversion results and correcting characteristics. This type of AD speed is higher than that of the successive comparison type, and the circuit scale is smaller than that of the parallel type.
4). (Sigma delta) modulation type (such as AD7705)
Sigma delta type AD is composed of integrators, comparators, 1-bit DA converters and digital filters. In principle, it is similar to the integral type. The input voltage is converted into a time (pulse width) signal, and a digital value is obtained after processing with a digital filter. The digital part of the circuit is basically easy to single chip, so it is easy to achieve high resolution. Mainly used for audio and measurement.
5). Capacitor array successive comparison type
Capacitor array successive comparison type AD adopts the capacitance matrix method in the built-in DA converter, and can also be called charge redistribution type. Most resistors in a general resistor array DA converter must have the same value, and it is not easy to generate high-precision resistors on a single chip. If the resistor array is replaced by a capacitor array, a high-precision single-chip AD converter can be made at a low cost. Most recent successive comparison type AD converters are capacitor array type.
6). Voltage-frequency conversion type (such as AD650)
Voltage-Frequency Converter (Voltage-Frequency Converter) realizes analog-to-digital conversion through indirect conversion. Its principle is to convert the input analog signal into a frequency first, and then use a counter to convert the frequency into a digital quantity. In theory, the resolution of this AD can be increased almost infinitely, as long as the sampling time can meet the width of the cumulative pulse number required by the output frequency resolution. Its advantages are high resolution, low power consumption, and low price, but it requires an external counting circuit to complete AD conversion.
2. Main technical indicators of AD converter
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1). Resolution refers to the variation of the analog signal when the digital quantity changes by a minimum amount, and is defined as the ratio of full scale to 2n. Resolution, also known as precision, is usually expressed in the number of digits of a digital signal.
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2). Conversion Rate (Conversion Rate) refers to the reciprocal of the time required to complete an AD conversion from analog to digital. The conversion time of the integral type AD is in the millisecond level and belongs to the low-speed AD, the successive comparison type AD is in the microsecond level and belongs to the medium-speed AD, and the full parallel/serial parallel type AD can reach the nanosecond level. Sampling time is another concept, referring to the interval between two conversions. In order to ensure the correct completion of the conversion, the sampling rate (Sample Rate) must be less than or equal to the conversion rate. Therefore, it is acceptable for some people to numerically equate the conversion rate with the sampling rate. Commonly used units are ksps and Msps, which means dry/million samples per second (kilo / Million Samples per Second).
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3).Quantizing Error (Quantizing Error) is the error caused by the limited resolution of AD, that is, the difference between the stepped transfer characteristic curve of limited resolution AD and the transfer characteristic curve (straight line) of infinite resolution AD (ideal AD). maximum deviation. Usually it is the analog variation of 1 or half of the smallest digital quantity, expressed as 1LSB, 1/2LSB.
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4). Offset Error (Offset Error) When the input signal is zero, the output signal is not zero, which can be adjusted to the minimum by an external potentiometer.
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5).Full Scale Error (Full Scale Error) is the difference between the corresponding input signal and the ideal input signal value during full output.
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6). Linearity (Linearity) The maximum deviation between the transfer function of the actual converter and the ideal straight line, excluding the above three errors. The difference between INL and DNL Before talking about accuracy, we must first talk about resolution. Recently, there have been popular posts discussing this issue, and the conclusion is that resolution is by no means equal to accuracy. For example, a four-and-a-half-digit multimeter with an accuracy of 0.2% (or the accuracy of 0.2 as it is often said) measures the voltage at point A as 1.0000V and the voltage at point B as 1.0005V. The value may be indeterminate between 0.9980~1.0020.
Well, since the digital multimeter has two indicators of accuracy and resolution, then, for ADCs and DACs, there are also indicators of accuracy in addition to resolution. The precision index of the analog-to-digital device is represented by the integral nonlinearity (Interger NonLiner), that is, the INL value. Some device manuals are also represented by Linearity error. INL represents the error value at the point where the error between the analog value of the ADC device at all numerical points and the true value is the largest. That is, the maximum distance that the output value deviates from linearity. The unit is LSB (that is, the amount represented by the lowest bit).
Next let's talk about the DNL value.
Theoretically speaking, the difference between analog quantities is the same between adjacent quantities of analog-to-digital devices. Just like a ruler with even density. But this is not the case. For a ruler with a resolution of 1 mm, it is impossible for the distance between two adjacent scales to be exactly 1 mm. Then, the maximum difference between two adjacent scales of the ADC is called the differential non-linear value (Differential NonLiner).
If the DNL value is greater than 1, then the ADC cannot even be guaranteed to be monotonic. As the input voltage increases, the value will decrease at a certain point. This phenomenon is common in SAR (bit-by-bit comparison) ADCs. Many ADCs with the same resolution have different prices. In addition to reasons such as speed and temperature level, it is the difference between the two values of INL and DNL.
In addition, the process and principle also determine the accuracy. For example, SAR-type ADC, due to the use of R-2R or C-2C structure, makes a small error of high-weight resistors, which will cause errors of several last digits. Near the 2^n point of the SAR ADC, such as 128, 1024, 2048, switching weight point resistance, the error is the largest. The voltage corresponding to the value of 1024 may even be lower than the voltage corresponding to the value of 1023. This is why the DNL value of many SAR type devices will exceed 1. But the INL value of the SAR ADC is very small, because the error of the weight resistor will not accumulate.
The exact opposite of the SAR type device is the ladder resistance type analog-to-digital/digital-to-analog device.
Here I want to mention the double integral ADC, its principle can guarantee linearity. Special mention should also be made of reference sources. The reference source is an important guarantee of measurement accuracy. The key indicator of the benchmark is temperature drift, which is generally expressed in ppm/K (ppm one millionth). Assuming that a certain reference is 30ppm/K, the system works between 20 and 70 degrees, and the temperature span is 50 degrees, then it will cause a drift of 30*50=1500ppm in the reference voltage, resulting in an error of 0.15%. The reference source with smaller temperature drift is more expensive.
A phenomenon that is funny to say: when most of the new students here design the ADC circuit for the first time, the reference is directly connected to VCC, and they find N textbooks confidently. The reference in the book writes a net mark: +5V .
All school textbooks are referenced to 5V. How good is it to change 5V to 5.000V in the textbook? Students will know that this 5V is not VCC. Or mention that the benchmark needs high stability!
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