Arithmetic and logical operations

These instruction classes have various variants of operand sizes (only leaq does not), for example ADD consists of four addition instructions: addb, addw, addl, addq.

instruction	Effect	describe
leaq S, D	D<—&S	load valid address
INC D	D<—D+1	plus 1
DEC D	D<—D-1	minus 1
NEG D	D<— —D	Negative
NOT D	D<—~D	complement
ADD S,D	D<—D+S	add
SUB S,D	D<—D-S	reduce
IMUL S,D	D<—D*S	take
XOR S,D	D<—D^S	XOR
OR S,D	D<—D|S	or
AND S,D	D<—D&S	and
SAL k, D	D<—D<	shift left
SHL k,D	D<—D<	Left shift (equivalent to SAL)
SAR k,D	D<—D>>k	Arithmetic shift right
SHR k,D	D<—D>>k	logical shift right

Note: leaq is a variant of movq, which writes the effective address content into a register, which is often used for addition and multiplication. Such as leaq 7(%rdx, %rdx, 4), %rax; If the value of %rax is x, the result is 5X+7

The shift operation operates on w-bit long data values,$2^m = w$. For example for salq,$2^6 = 84$, so only 6 bits are considered as the displacement size.

special arithmetic operations

The x86-64 instruction set has limited support for 128-bit operations. Intel calls 16-byte numbers an oct word.

instruction	Effect	describe
imulq S	R[%rdx]:R[%rax]<—SxR[%rax]	Signed full multiplication
mulq S	R[%rdx]:R[%rax]<—SxR[%rax]	Unsigned full multiplication
clto	R[%rdx]:R[%rax]<—sign extension (R[%rax])	Convert bit octets
idivq S	R[%rdx]<—R[%rax]:R[%rax] mod S
	R[%rdx]<—R[%rax]:R[%rax] 除 S	signed division
divq S	R[%rdx]<—R[%rax]:R[%rax] mod S
	R[%rdx]<—R[%rax]:R[%rax] 除 S	unsigned division

Special arithmetic operations. These operations provide full 128-bit multiplication and division of signed and unsigned numbers. A pair of registers %rdx and %rax form a 128-bit octet