Description. The article is excerpted from: SPI protocol and its working principle analysis http://bbs.chinaunix.net/thread-1916003-1-1.html
Because I have to submit a paper about the SPI bus, I have made some small summaries of SPI for a while. I plan to communicate with you here. I hope you can give me some suggestions and point out some mistakes and deficiencies. gratitude
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1. Overview.
SPI, Serial Perripheral Interface, Serial Peripheral Interface, is introduced by Motorola A synchronous serial interface technology. The SPI bus is physically connected to the peripheral microcontroller (PICmicro) through a module called the Synchronous Serial Port (Module) on the microprocessor control unit (MCU) above. ) to achieve, it allows MCU to perform high-speed data communication with various peripheral devices in full-duplex synchronous serial mode.
SPI is mainly used in EEPROM, Flash, real-time clock (RTC), digital-to-analog converter (ADC), Between the digital signal processor (DSP) and the digital signal decoder. It only occupies four pins (Pin) in the chip for control and data transmission, which saves the number of pins on the chip and saves the layout of the PCB. Space. It is because of this simple and easy-to-use feature that more and more chips are integrated with SPI technology.
2. Features
1. Using the master-slave mode (Master-Slave) control method
SPI stipulates that the communication between two SPI devices must be controlled by the master device (Master) to control the slave device (Slave). A Master device can control multiple Slave devices by providing Clock and performing Slave Select on the Slave device. The SPI protocol also stipulates that the clock of the slave device is provided to the slave device by the master device through the SCK pin. The slave device itself cannot generate or control the clock. Without the clock, the slave device cannot work normally. 2. The master device
transmits data in a synchronous manner (Synchronous)
The corresponding clock pulse (Clock Pulse) will be generated according to the data to be exchanged. The clock pulse constitutes the clock signal (Clock Signal). The clock signal controls the communication between the two SPI devices through the clock polarity (CPOL) and clock phase (CPHA). When data is exchanged and when the received data is sampled to ensure that the data is transmitted synchronously between the two devices.
3. Data Exchanges (Data Exchanges)
The reason why data transmission between SPI devices is also called data Exchange, because the SPI protocol stipulates that an SPI device cannot only act as a "Transmitter" or "Receiver" in the process of data communication. In each Clock cycle, the SPI device will send and receive a Bit-sized data, equivalent to the device having a bit-sized data exchanged.
In order for a slave device to be able to receive the control signal sent by the master, it must be accessed by the master device before that. Therefore, the master device must first select the slave device through the SS/CS pin, and select the desired The accessed Slave device is selected.
In the process of data transmission, each received data must be sampled before the next data transmission. If the previously received data has not been read, then these received data will be possible will be discarded, resulting in the final failure of the SPI physical module. Therefore, in the program, the data in the SPI device is generally read after the SPI transmits the data, even if the data (Dummy Data) is useless in our program.
3. Working Mechanism
1. Overview
The above figure is just a brief description of the communication between SPI devices. Let's explain several components (Module) shown in the figure:
SSPBUF, Synchronous Serial Port Buffer, generally refers to the internal buffer in the SPI device, generally in Physically, it is in the form of FIFO to save the temporary data during the transmission process;
SSPSR, Synchronous Serial Port Register, generally refers to the shift register (Shift Register) in the SPI device, its function is to set the data bit width (bit -width) Move data into or out of SSPBUF;
Controller, generally refers to the control registers in the SPI device, you can configure them to set the transmission mode of the SPI bus.
Usually, we only need to set the four pins described in the above figure (pin) programming can control the data communication between the entire SPI devices:
SCK, Serial Clock, the main function is that the Master device transmits the clock signal to the Slave device, and controls the timing and rate of data exchange;
SS/CS, Slave Select/ Chip Select, used for the Master device to select the Slave device, so that the selected Slave device can be accessed by the Master device;
SDO/MOSI, Serial Data Output/Master Out Slave In, also called Tx-Channel on the Master, as Data export, mainly used for SPI device to send data;
SDI/MISO, Serial Data Input/Master In Slave Out, 在 Master 上面也被称为 Rx-Channel, 作为数据的入口, 主要用于SPI 设备接收数据;
SPI 设备在进行通信的过程中, Master 设备和 Slave 设备之间会产生一个数据链路回环(Data Loop), 就像上图所画的那样, 通过 SDO 和 SDI 管脚, SSPSR 控制数据移入移出 SSPBUF, Controller 确定 SPI 总线的通信模式, SCK 传输时钟信号.
2. Timing.
上图通过 Master 设备与 Slave 设备之间交换1 Byte 数据来说明 SPI 协议的工作机制.
首先, 在这里解释一下两个概念:
CPOL: 时钟极性, 表示 SPI 在空闲时, 时钟信号是高电平还是低电平. 若 CPOL 被设为 1, 那么该设备在空闲时 SCK 管脚下的时钟信号为高电平. 当 CPOL 被设为 0 时则正好相反.
CPOL = 0: SCK idle phase is low;
CPOL = 1: SCK idle phase is high;
CPHA: 时钟相位, 表示 SPI 设备是在 SCK 管脚上的时钟信号变为上升沿时触发数据采样, 还是在时钟信号变为下降沿时触发数据采样. 若 CPHA 被设置为 1, 则 SPI 设备在时钟信号变为下降沿时触发数据采样, 在上升沿时发送数据. 当 CPHA 被设为 0 时也正好相反.
CPHA = 0: Output data at negedge of clock while receiving data at posedge of clock;
CPHA = 1: Output data at posedge of clock while receiving data at negedge of clock;
上图里的 "Mode 1, 1" 说明了本例所使用的 SPI 数据传输模式被设置成 CPOL = 1, CPHA = 1. 这样, 在一个 Clock 周期内, 每个单独的 SPI 设备都能以全双工(Full-Duplex) 的方式, 同时发送和接收 1 bit 数据, 即相当于交换了 1 bit 大小的数据. 如果 SPI 总线的 Channel-Width 被设置成 Byte, 表示 SPI 总线上每次数据传输的最小单位为 Byte, 那么挂载在该 SPI 总线的设备每次数据传输的过程至少需要 8 个 Clock 周期(忽略设备的物理延迟). 因此, SPI 总线的频率越快, Clock 周期越短, 则 SPI 设备间数据交换的速率就越快.
3. SSPSR.
SSPSR 是 SPI 设备内部的移位寄存器(Shift Register). 它的主要作用是根据 SPI 时钟信号状态, 往 SSPBUF 里移入或者移出数据, 每次移动的数据大小由 Bus-Width 以及 Channel-Width 所决定.
Bus-Width 的作用是指定地址总线到 Master 设备之间数据传输的单位.
例如, 我们想要往 Master 设备里面的 SSPBUF 写入 16 Byte 大小的数据: 首先, 给 Master 设备的配置寄存器设置 Bus-Width 为 Byte; 然后往 Master 设备的 Tx-Data 移位寄存器在地址总线的入口写入数据, 每次写入 1 Byte 大小的数据(使用 writeb 函数); 写完 1 Byte 数据之后, Master 设备里面的 Tx-Data 移位寄存器会自动把从地址总线传来的1 Byte 数据移入 SSPBUF 里; 上述动作一共需要重复执行 16 次.
Channel-Width 的作用是指定 Master 设备与 Slave 设备之间数据传输的单位. 与 Bus-Width 相似, Master 设备内部的移位寄存器会依据 Channel-Width 自动地把数据从 Master-SSPBUF 里通过 Master-SDO 管脚搬运到 Slave 设备里的 Slave-SDI 引脚, Slave－SSPSR 再把每次接收的数据移入 Slave-SSPBUF里.
通常情况下, Bus-Width 总是会大于或等于 Channel-Width, 这样能保证不会出现因 Master 与 Slave 之间数据交换的频率比地址总线与 Master 之间的数据交换频率要快, 导致 SSPBUF 里面存放的数据为无效数据这样的情况.
4. SSPBUF.
我们知道, 在每个时钟周期内, Master 与 Slave 之间交换的数据其实都是 SPI 内部移位寄存器从 SSPBUF 里面拷贝的. 我们可以通过往 SSPBUF 对应的寄存器 (Tx-Data / Rx-Data register) 里读写数据, 间接地操控 SPI 设备内部的 SSPBUF.
例如, 在发送数据之前, 我们应该先往 Master 的 Tx-Data 寄存器写入将要发送出去的数据, 这些数据会被 Master-SSPSR 移位寄存器根据 Bus-Width 自动移入 Master-SSPBUF 里, 然后这些数据又会被 Master-SSPSR 根据 Channel-Width 从 Master-SSPBUF 中移出, 通过 Master-SDO 管脚传给 Slave-SDI 管脚, Slave-SSPSR 则把从 Slave-SDI 接收到的数据移入 Slave-SSPBUF 里. 与此同时, Slave-SSPBUF 里面的数据根据每次接收数据的大小(Channel-Width), 通过 Slave-SDO 发往 Master-SDI, Master-SSPSR 再把从 Master-SDI 接收的数据移入 Master-SSPBUF.在单次数据传输完成之后, 用户程序可以通过从 Master 设备的 Rx-Data 寄存器读取 Master 设备数据交换得到的数据.
5. Controller.
Master 设备里面的 Controller 主要通过时钟信号(Clock Signal)以及片选信号(Slave Select Signal)来控制 Slave 设备. Slave 设备会一直等待, 直到接收到 Master 设备发过来的片选信号, 然后根据时钟信号来工作.
Master 设备的片选操作必须由程序所实现. 例如: 由程序把 SS/CS 管脚的时钟信号拉低电平, 完成 SPI 设备数据通信的前期工作; 当程序想让 SPI 设备结束数据通信时, 再把 SS/CS 管脚上的时钟信号拉高电平.