1. Introduction to ADC
2. ADC input
The signal on the Port 0 pin can be used as an ADC input, and the input can be configured as a single-ended or differential input. Differential inputs include input pairs AIN0-1, AIN2-3, AIN4-5, and AIN6-7 when differential input is selected. It should be noted that the pin input cannot be a negative voltage, nor a voltage greater than VDD. In differential mode, what is converted is the difference between the signals on the input pair pins.3. ADC operating mode
The ADC has three control registers: ADCCON1, ADCCON2 and ADCCON3. These registers are used to configure the ADC and report the results.
①ADCCON1.EOC Conversion status bit, set to high level at the end of conversion.
②ADCCON1.ST conversion sequence is started. When set to high level, ADCCON1.STSEL state is 11 and there is no conversion operation to start a sequence. Cleared automatically after conversion is complete.
③ADCCON1.STSEL select which event will start a new conversion sequence.
④ADCCON2.SREF selects the reference voltage. Modifications are only allowed when no transformation is running.
⑤ADCCON2.SDIV Select the decimation rate (conversion time and resolution). Modifications are only allowed when no transformation is running.
⑥ADCCON2.SCH Select the channel of the conversion sequence.
⑦The function of ADCCON3 is basically the same as that of ADCCON2. The only difference is that the ADCCCON3 control is a single channel conversion.
4. ADC conversion result
When the conversion is over, the digital conversion result is available in ADCH and ADCL. Note that the conversion result is always stored in the MSB segment of the ADCH and ADCL register combinations.
5. ADC reference voltage
The positive reference voltage for analog-to-digital conversion is as follows, and the accuracy of the conversion result depends on the stability and noise properties of the reference voltage.
①The voltage generated inside the chip is 1.25v
②AVDD5 pin
③ External voltage of AIN7 input pin
④ Differential voltage of AIN6-AIN7 input pins
6. ADC conversion time and interrupt
Conversion time:
ADC conversion can only run on 32MHz XOSC. The ADC sampling frequency is 4MHz, which is generated by dividing the 32MHz XOSC by the internal frequency divider. The time required to perform a conversion depends on the selected decimation rate. Tconv = (decimation rate + 16) x 0.25 μs.
Interrupt:
The ADC will generate an interrupt when a single conversion controlled by ADCCON3 is complete.
When a sequence of conversions controlled by ADCCON2 is completed, the ADC will not generate an interrupt, but will generate a DMA trigger.