The backplane bandwidth of a switch is the maximum amount of data that can be handled between the switch interface processor or interface card and the data bus. The backplane bandwidth indicates the total data exchange capacity of the switch, and the unit is Gbps, also known as the switching bandwidth. The backplane bandwidth of a general switch ranges from several Gbps to hundreds of Gbps. The higher the backplane bandwidth of a switch, the stronger the data processing capability, but the higher the design cost.
Generally speaking, the calculation method is as follows:
1) Backplane bandwidth at line speed
Look at the total bandwidth that all ports on the switch can provide. The calculation formula is the number of ports * corresponding port rate * 2 (full-duplex mode). If the total bandwidth is less than or equal to the nominal backplane bandwidth, then the backplane bandwidth is wire-speed.
2) Layer 2 packet forwarding wire speed
The second layer packet forwarding rate = the number of gigabit ports × 1.488Mpps + the number of 100M ports * 0.1488Mpps + the number of other types of ports * the corresponding calculation method, if this rate can be ≤ the nominal layer two packet forwarding rate, then the switch is doing the second layer Swap can be done at line speed.
3) Layer 3 packet forwarding wire speed
Layer 3 packet forwarding rate = number of gigabit ports x 1.488Mpps + number of 100M ports * 0.1488Mpps + number of other types of ports * corresponding calculation method, if this rate can be ≤ the nominal layer 3 packet forwarding rate, then the switch is doing the third layer Swap can be done at line speed.
So, how did you get 1.488Mpps?
The measurement standard of packet forwarding line speed is based on the number of 64byte data packets (minimum packets) sent per unit time as the calculation benchmark
For Gigabit Ethernet, the calculation method is as follows: 1,000,000,000bps/8bit/(64+8+12)byte=1,488,095pps Note: When the Ethernet frame is 64byte, the frame header of 8byte and the frame gap of 12byte should be considered fixed overhead. Therefore, the packet forwarding rate of a wire-speed Gigabit Ethernet port is 1.488Mpps when forwarding 64byte packets. The packet forwarding rate of Fast Ethernet is exactly one-tenth of that of Gigabit Ethernet, which is 148.8mpps.
For 10 Gigabit Ethernet, the packet forwarding rate of a wire-speed port is 14.88Mpps.
For Gigabit Ethernet, the packet forwarding rate of a wire-speed port is 1.488Mpps.
For Fast Ethernet, the packet forwarding rate of a wire-speed port is 0.1488Mpps.
For the POS port of OC-12, the packet forwarding rate of a wire-speed port is 1.17Mpps.
For the POS port of OC-48, the packet forwarding rate of a wire-speed port is 468MppS.
Therefore, if the above three conditions can be met, then we can say that this switch truly achieves linear non-blocking
The utilization of backplane bandwidth resources is closely related to the internal structure of the switch. At present, the internal structure of the switch mainly includes the following: First, the shared memory structure, which relies on the central switching engine to provide high-performance connections of all ports, and the core engine checks each incoming packet to determine the route. This method requires a large memory bandwidth and high management costs, especially with the increase of switch ports, the price of the central memory will be high, so the switch core becomes the bottleneck of performance realization; the second is the cross bus structure, which can Establish a direct point-to-point connection between ports, which has good performance for single-point transmission, but is not suitable for multi-point transmission; the third is the hybrid cross-bus structure, which is a hybrid cross-bus implementation. Its design idea is to integrate an integrated The cross bus matrix is divided into small cross matrix, and the middle is connected by a high-performance bus. The advantage is that the number of crossover buses is reduced, the cost is reduced, and the bus contention is reduced; but the bus connecting the crossover matrix becomes a new performance bottleneck.