Deep Learning Hardware: TPU, DSP, FPGA, AI ASIC, Systolic Array Hands-on Deep Learning v2

1. TPU and others

1.1 Mobile phone chip

1.2 DSP digital signal processor digital signal processing

1.3 Programmable Array FPGA - field-programmable gate array

1.4 AI ASIC - Application-specific integrated circuits

Systolic Array

• 1. FPGA Huawei uses a lot to make routers.
• 2. To build a chip, there must be an ecology, a development ecology and an ecology of researchers, that is, there are many people optimizing the compiler, which is easy to use.
• 3. When making chips, you need to choose software and when it is good enough, such as building AlexNet, no one will use it later; but if you make ResNet, it is very good, and it will be used from 2016 to 2019. Transformer is currently more popular.
     
• 4. RISC-V is an open source instruction set architecture based on the principle of reduced instruction set, which is simply explained as a kind of "open source hardware" corresponding to the movement of open source software. The project started at UC Berkeley in 2010, but many contributors are volunteers and industry workers outside the university. RISC-V is an open standard instruction set architecture (ISA) based on reduced established instruction set computer (RISC) principles.

reference

https://www.bilibili.com/video/BV1VV41147PC/?spm_id_from=trigger_reload