Use 51 to drive the use of AD9833 module
About AD9833
AD9833 is a low-power, programmable waveform generator, capable of generating sine wave, triangle wave and square wave output. Various types of detection, signal excitation, and time domain reflectometry (TDR) applications require waveform generators. The output frequency and phase can be programmed through software, which is easy to adjust. No external components are required. The frequency register is 28 bits: when the clock rate is 25 MHz, a resolution of 0.1 Hz can be achieved; and when the clock rate is 1 MHz, a resolution of 0.004 Hz can be achieved. AD9833 writes data through a three-wire serial interface. The serial interface can work at a clock rate of up to 40 MHz and is compatible with DSP and microcontroller standards. The device is powered by a 2.3 V to 5.5 V power supply, and the AD9833 has a power saving function. This feature allows unused parts of the device to be turned off, thereby minimizing power consumption. For example, when generating a clock output, the DAC can be turned off.
Related parameters
1 Pin description:
| Pin | name | description |
|---|---|---|
| 1 | COMP | DAC bias pin |
| 2 | VDD | Positive power supply for analog and digital interface sections. The on-chip 2.5V regulator also uses VDD for power supply. The value of VDD ranges from 2.3V to 5.5V. A 0.1 uF and a 10 uF decoupling capacitor should be connected between VDD and AGND. |
| 3 | CAP/2.5V | The digital circuit is powered by a 2.5V power supply. When VDD exceeds 2.7V, this 2.5V is generated from VDD using the on-chip voltage regulator. This regulator requires a decoupling capacitor with a typical value of 100 nF between CAP/2.5V and DGND. If VDD is less than or equal to 2.7V, CAP/2.5V should be directly connected to VDD. |
| 4 | DGND | Digitally |
| 5 | MCLK | Digital clock input. The DDS output frequency is a fraction of the MCLK frequency, and the numerator of the fraction is a binary number. Both the output frequency accuracy and phase noise are determined by this clock. |
| 6 | SDATA | Serial data input. A 16-bit serial data word is applied to this input. |
| 7 | SCLK | Serial clock input. Data is input to AD9833 one by one on each falling edge of SCLK. |
| 8 | FSYNC | Active low control input. FSYNC is the frame synchronization signal of the input data. When FSYNC goes low, it informs the internal logic that a new data word is being loaded into the device. |
| 9 | AGND | Analog ground |
| 10 | VOUT | Voltage output. Both the analog and digital outputs of AD9833 are provided through this pin. Since the device has a 200Q resistor on-chip, there is no need to connect an external load resistor. |
2: Schematic
Procedure flow chart
Code piece
The single-chip microcomputer used is an 8051 single-chip, which realizes the effect of outputting a sine wave. The following code is defined by the AD9833 header file.
#define TRI_WAVE 0 //输出三角波
#define SIN_WAVE 1 //输出正弦波
#define SQU_WAVE 2 //输出方波
void AD9833_WaveSeting(double frequence,unsigned int frequence_SFR,unsigned int WaveMode,unsigned int Phase );
void AD9833_Init_GPIO(void);
void AD9833_AmpSet(unsigned char amp);
if(WaveMode==TRI_WAVE) //输出三角波波形
AD9833_Write(0x2002);
if(WaveMode==SQU_WAVE) //输出方波波形
AD9833_Write(0x2028);
if(WaveMode==SIN_WAVE) //输出正弦波形
AD9833_Write(0x2000);
Upload program
AD9833_WaveSeting(2000.0,0,SIN_WAVE,0 );//2KHz, 频率寄存器0，正弦波输出 ,初相位0
AD9833_AmpSet(200); //设置幅值，幅值最大 255
The output sine wave of the program configuration, and then use the oscilloscope to pull out the waveform, as shown in the figure below
to sum up
In the application field, this module can be used as a waveform signal generator. For 51 single-chip microcomputers, it can be used as a small signal generator. The program includes codes for adjusting amplitude and frequency. If you like this article, please pay attention to it for a long time.