Overview: Generally, testing a device with a digital interface needs to be able to wait for the device to respond to a specific pattern sequence sent to it. This is especially true for devices that include bus transfers that use hardware handshaking to synchronize data transfers. The GX5280/GX5290 digital instrument card series provide 16 external event inputs that can be used to support this handshake process. This article describes how to use external events to perform synchronous pause/resume operations on the device under test (DUT).
External case
GX5280 and GX5290 digital IO instruments (DIO) provide 16 external input signals, which can be used to pause and trigger (resume) digital mode sequences. This ability to pause and then resume mode sequencing based on hardware signals is essential for performing closed-loop handshake for data transmission. Figure 1 below provides a functional block diagram of the external event control.
Figure 1 Diagram of external events
There are three pairs of registers that define how to use external events, marked as "D" event, "T" event and "P" event. Each register pair has a 16-bit event mode and a 16-bit event mask that ignores unused bits. A logic "1" enables the event input signal, and a logic "0" disables or shields the corresponding input. Together, the event/mask combination defines a 16-bit value, which is passed to the pattern sequencer for calculation.
The "D" and "T" events are used to trigger the pattern sequencer. Triggers can be based on a single pattern match of "D" or "T" events, or they can be combined to define a sequence of triggers that must be met in order to meet the conditions of a valid trigger-just like a pre-trigger followed by an actual trigger . The sequence of events can be defined as "D" followed by "T", or "T" followed by "D".
When the defined event conditions are met, the "P" event will force the DIO sequencer to pause mode execution.
DIO does provide software commands that can pause and trigger pattern sequencing, but the software control is not synchronized with the data flow, and usually cannot run at the speed that the DUT can achieve or the speed required by the data transmission protocol. The control register built into the instrument mode sequencer can be used to suspend execution at a specific vector, but the control register has only one state depth-which means that there can only be one pause command in the entire mode sequence without software intervention. Using software to reprogram the pause vector can be used to extend the single pause command, but it will slow the handshake process to an unacceptable time.
High-speed hardware handshake
Using external event input and unused IO pins on DIO, high-speed hardware handshake can be realized. By connecting the unused pins on the J1 connector to the external event input on the J3 connector, you can program the hardware "pause" on almost any vector or any number of vectors within the full mode length of the instrument-effectively Unused IO channels are converted to additional pause commands. For example, if IO channel 30 (J1-P31) is connected to external event input signal 2 (J3-P3), if "P" event is defined as mask=0x0004, and event=0x0004, IO channel 30 will become a pause control signal. Then, any vector in which the IO channel 30 is programmed to logic "1" will force the DIO to enter the suspended state. Assuming that DIO acts as a controller in data transmission involving handshake, program a "P" event at the vector where the controller must wait for the DUT to confirm the data transmission, forcing the entire DIO domain (all IO channels) to enter the pause waiting for trigger state. The continuous trigger can be generated by software, from an external trigger input, received from the PXI backplane, or from using the same external event used to force the pause state.
If the DUT handshake response is also connected to an external event input, for example, event signal 0 (J3-P1), and you choose to use the "D" event to restore the mode sequence, then you can define the "D" event trigger as a mask = 0x0001 and event-0x0001. When DIO is paused, a logic "1" on event input 0 will trigger the instrument and continue the execution mode.
There are some considerations when using external events:
- Events are level sensitive and are not generated by rising or falling edges
- The suspension is not immediate. At least 16 vectors are required to achieve a pause. The maximum running time depends on the pattern rate.
The reasons for the changes in vector operation are as follows:
- Pause events have a propagation delay of approximately 350 nS, which can be used for pattern sequencing logic. When using DIO loopback for pause control, 16 states of stimulus/response channels must be considered .
- Synchronous external event pause/trigger only needs 1 vector to start the pause.
- Asynchronous external event pause/trigger requires at least 2 vectors to start the pause.
- Up to 8 vectors can be used to initiate a pause. The DIO channel will retain the pause event state. If the pause signal is applied to too many vectors, the pause may be initiated immediately after receiving the resume trigger.
- At high data rates, ground bounce may cause erroneous or intermittent pause/trigger operations because the bounce may exceed the vector period of the instrument operation.
The propagation delay of approximately 350 nS and 16-state channels will delay the pause of the DIO mode from the smallest 16 states to the largest approximately 50 vector states. The mode immediately after the pause signal should be set to static so that the logic state provided to the DUT is not changed while waiting for the handshake confirmation. The length of the running time depends on the data rate of the DIO for the following reasons.
Figure 2-Low data rate pause timing
In Figure 2 above and Figure 3 below, the propagation delay (Tpd) is the same duration (~350ns). Figure 3 has been expanded to better show timing details. As you can see in Figure 2, Tpd is less than 1 vector period, so its impact is included in the first clock cycle after the pause signal. The mode clock is slow enough that the effect of Tpd is hidden (contained) in the vector that generates the pause trigger (blue clock cycle). Therefore, the pause operation is only affected by the instrument channel. After the pause event (red clock cycle), DIO pauses at 16 vectors.
Figure 3-High data rate pause timing
In Figure 3, the vector clock runs faster, and the same Tpd duration spans multiple mode clocks. During the Tpd period, the mode clock (yellow clock cycle) has no effect on the pause trigger state of the movement through the instrument channel . So, in fact, pause-run-on is expanded to the number of mode clocks included in the Tpd duration-5 clock cycles in the example. The vector where the pause occurs is 21 vectors after the pause event (red clock cycle)-16 vectors of the pipeline + 5 vectors of Tpd. If DIO runs on a 100 MHz (10 nanosecond) cycle, 35 additional clocks may occur during the Tpd (350 nanosecond/10 nanosecond cycle). At high data rates, due to small changes in Tpd delay, there is some ambiguity about the exact vector where the pause will take effect, so the operation of the pipeline and Tpd should be described for the data rate at which the test mode will run.
Figures 4:1-4:6 below show examples of this. Each image is a screenshot of the GtDio panel running the same test mode. In each case, the pause signal is programmed to vector 5000. The only difference between the screenshots is the data rate of the execution mode. Looking at the highlighted field in Figure 4:1 shows that the mode clock is running at 1MHz. The period of 1us is much higher than the Tpd value, so the pause takes effect at vector 5016. The following figure shows the different mode clocks, up to 100 MHz, and the pause vector generated by each clock.
Figure 4-1 Pause vector at MHz-100MHz data rate
to sum up
Although GX5280 and GX5290 digital IO instruments use programmable registers or software commands to provide mode control, the use of unused DIO resources can expand the functions of DIO instruments to support multiple pause/resume points throughout the entire depth of the UUT test mode. Or it can be pre-loaded into multiple pattern sets of the 64M vector DIO pattern memory.
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