Assembly language-non-maskable interrupt

      Non-maskable interrupts are external interrupts that the CPU must respond to. When the CPU detects the non-maskable interrupt information, it responds immediately after executing the current instruction and triggers the interrupt process.

 

For the 8086CPU, the interrupt type code of the non-maskable interrupt is fixed at 2, so there is no need to fetch the interrupt type code during the interrupt process. Then the interrupt process of the non-maskable interrupt is: ①The flag register is pushed into the stack, IF=0, TF=0; ②CS, IP is pushed into the stack; ③(IP)=(8), (CS)=(0AH).

 

Almost all external interrupts caused by peripherals are maskable interrupts. When an external event (such as keyboard input) that needs to be processed occurs, the relevant chip sends a maskable interrupt message to the CPU. The non-maskable interrupt is the interrupt information used to notify the CPU when an emergency situation in the system occurs.

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Origin blog.csdn.net/ma2595162349/article/details/108564336