ATA and ATAPI mechanical hard drive

1 ATA寄存器
1.1 PCI IDE
Primary IDE controller: 1F0h to 1F7h and 3F6h to 3F7h
Secondary IDE controller: 170h to 177h and 376h to 377h

BAR0: Base address of primary channel (I/O space), if it is 0x0 or 0x1, the port is 0x1F0.
BAR1: Base address of primary channel control port (I/O space), if it is 0x0 or 0x1, the port is 0x3F6.
BAR2: Base address of secondary channel (I/O space), if it is 0x0 or 0x1, the port is 0x170.
BAR3: Base address of secondary channel control port, if it is 0x0 or 0x1, the port is 0x376.
BAR4: Bus Master IDE; refers to the base of I/O range consisting of 16 ports. Each 8 ports controls DMA on the primary and secondary channel respectively.
BAR5:SATA AHCI Base Address

BAR0-BAR4 BAR5 IDE and SATA AHCI mode using mode of use are mutually exclusive, only choose one.
Figure 1-1 PCI Header

1.2 寄存器描述
1F0 (Read and Write): Data Register
1F1 (Read): Error Register
1F1 (Write): Features Register
1F2 (Read and Write): Sector Count Register
1F3 (Read and Write): LBA Low Register
1F4 (Read and Write): LBA Mid Register
1F5 (Read and Write): LBA High Register
1F6 (Read and Write): Drive/Head Register
1F7 (Read): Status Register
1F7 (Write): Command Register
3F6 (Read): Alternate Status Register
3F6 (Write): Device Control Register

1.3 ATA模式识别
读取4个寄存器的值("Sector Count" and "LBA Low,Mid,High" registers)
ATA:0x01, 0x01, 0x00, 0x00
ATAPI:0x01, 0x01, 0x14, 0xEB

2 ATAPI SFF-8070i
1) Select the master or the slave disk (PCI IDE controller supports a maximum of four port, a PCI SATA controller supports up to 32 port), write register Drive / Head (1F6)
2) write to the PIO or DMA mode register feature (1F1)
. 3) to write the sector size register LBA Mid and High (1F4 and 1F5)
. 4) offset the IDE command register 07 (1F7) writing 0xA0 (ATA_CMD_PACKET)
the SCSI. 5) to write the 12-byte packet data register (1F0), IDE interrupt waiting
6) the reading of bytes transferred from LBA Mid and High
. 7) read from the data register (1F0), or to the data register (1F0) writing data, waiting for an interrupt

3 USB to ATA / ATAPI Bridge
the SFF-8070i / the ATAPI of BOT: 0x08 / 0x05 / 0x50

. 4 master mechanical hard
4.1 AVAGO TTTNS44310
4.2 B5502D0 the LSI
4.3 chip motor
the STM the SMOOTH L7232

. 5 URLs
AT89C51SND1C
https://m.book118.com/html/2018/0523/168173987 .shtm? from = mip

ATAPI
https://wiki.osdev.org/ATAPI

PCI IDE the Controller
https://wiki.osdev.org/PCI_IDE_Controller

. 6 Abbreviations
the MMC-2: the SCSI-2 Multimedia the Commands
the SFF 8020i-: the Small Form1 Factor Committee, compact Committee

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