When UVM verification environment to access the register, the register model are typically generated by ralf file, and then complete the read and write operations register by calling the write / read function. However, registers are more different modules developers to write nmanager document format is not unified, not facilitate the creation of ralf file.
However, we want to access the DUT registers, one approach is to define a sequence, this sequence contains the register address and the corresponding variables need to access, and then in the body function by calling uvm_do_ * series macro complete access to the register; then register with the increase, the more the register contents body functions to be added later is not conducive to extended use.
Now know the source code sequence, when using the default settings uvm_config_db or start sequence, the function calls the body, the order of calling the function as follows:
However, by calling start_item / finish_item function, the body does not call the function, which calls the function in the following order :
refer to this function call relationship, write wr_reg / rd_reg the task, in order to achieve complete through the address register read and write access; read and write, first create a little action means uvm_create macro, the macro will then help uvm_send xaction sent; reading when the register is taken, it is noted that the returned data is returned in the xaction.
process uvm_driver as follows:
after processing the upper side, the use of new reg_sequence, and then call wr_reg rd_reg can complete the corresponding access register.
Access Register / packets sent Another method uses a sequence of
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Origin blog.csdn.net/weixin_39662684/article/details/104749051
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