Perhaps you often asked?
What is the role of Volatile keyword?
How to achieve the underlying implementation of these actions?
Volatile able to guarantee visibility and orderly? Atomic sex?
Foreword
As we all know, the Java code is compiled into Java bytecode will, bytecode classes loaded into the JVM, JVM byte code execution, must be transformed into the final assembly instruction execution on the CPU, as used in Java the mechanism relies on the concurrent JVM implementation and the CPU instruction.
Volatile role
Java Language Specification Version 3 definition of volatile follows: Java programming language allows threads to access shared variables, in order to ensure shared variables can be accurately and consistently updated thread should ensure exclusive lock to get through this variable alone. We look at the following chart to understand. 2 when the CPU must go to main memory operations counter variable ,, they read the main memory variable counter to their cpu cache, and then the operation data. Changing operation of CPU1 counter = 7, is not visible on the CPU2.
Achieve visibility
The above example, if we add Volatile keyword in fact underlying this is so.
1) The data in the current processor cache line is written back to system memory.
2) written back to main memory handling can lead to data cache memory address is not valid in the other CPU, the CPU to perform other time, we need to retrieve data from main memory.
Achieve a ban on instruction reordering
禁止指令重排序有没有什么例子？可以参考下我的另一篇文章： DCL的单例一定是线程安全的吗 All instruction is prohibited Java memory model is actually implemented by the memory barrier (Memory Barrier) reordering, all write operations before the memory barrier must be written back to main memory, all read operations after the memory barrier can be obtained before the memory barrier write the latest results of the operation (of visibility).
Barrier type instruction illustration
LoadLoad Load1; LoadLoad; Load2 ensure load1 reading operation performed prior to and subsequent read operations load2
StoreStore Store1; StoreStore; Store2 a write operation is performed before and after store2 ensure store1 write operation refreshed to main memory
LoadStore Load1; LoadStore; store2 write operation is performed before and after stroe2 ensure load1 read operation has ended read
StoreLoad store1; StoreLoad; after Load2 ensure store1 write operation has been flushed to main memory, load2 and after the read operation to perform
For example, write in the object instance, before adding StoreStore, after adding StoreLoad.
VM vendors memory barrier (Memory Barrier) technology is to follow the MESI protocol. Other unreasonable virtual machine vendors may have other technologies, but also need to follow the MESI protocol.
MESI refers to the first letter in state 4. Each Cache line has four states, represented by bit 2 is available, they are:
Perhaps you might ask why this is actually the main memory, the CPU with a cache protocol MESI protocol, I initiate, Choi said that a lot of content, the students want to learn, you can own Baidu
Summary: volatile implements the Java memory model visibility and orderliness, it's these two characteristics are achieved by a memory barrier, while the volatile unable to guarantee atomicity. (Because ordering problem is caused by compiler optimizations, cache visibility is a problem caused by inconsistent, and atomic, thread switching problem is caused by)