JTAG
Mainly used for chip testing. Now most advanced devices support the JTAG protocol, such as DSP , FPGA devices. 4 is a standard JTAG interface cable: TMS, TCK, TDI, TDO , were selected as the mode, a clock, a data input and data output lines.
Chip having JTAG JTAG port has the following pin definitions:
TCK-- test clock input;
TDI-- test data input, data input TDI JTAG port;
TDO-- test data output , the data output from the TDO through the JTAG port;
TMS-- Test Mode Select, TMS JTAG port is used to set a particular test mode.
TRST-- optional test reset pin, an input pin, active low.
JTAG port types of chips containing more, such as CPU, DSP, CPLD like.
14 pin
1, 13 VCC power supply connected to
2, 4, 6, 8, 10, 14 GND Ground
3 nTRST test system reset signal
5 TDI serial input data test
7 TMS Test Mode Select
9 TCK Test Clock
11 TDO serial output test data
12 NC No connection
20 pin
1 VTref target board reference voltage, then the power
2 VCC to the power
3 nTRST test system reset signal
4,6,8,10,12,14,16,18,20 GND Ground
5 TDI serial input data test
7 TMS Test Mode Select
9 TCK Test Clock
11 RTCK return test clock signal
13 TDO serial output test data
15 nRESET target system reset signal
17, 19 NC unconnected
10-pin
Emulator port AVR port Notes
1. TCK TCK
2. NC NC
3. TDO TDO
4. Vtref VCC
5. TMS TMS
6. nSRST RESET
7. NC / Vsupply NC / VCC JTAG ICE Emulator: VCC; JTAG ICE mkII emulator: NC
8. nTRST NC ATMEL yet retains the port, now it is not in use, the future may use
9. TDI TDI
10.GND GND
