14-day learning training camp instructor course: Zhou Hehe "ARMv8/ARMv9 Architecture - Quick Start"
1. MMU（Memory Management Unit）
The meaning of the memory management unit, MMU is to convert the virtual address of the software program into a real physical address.
2. Types of MMUs
- Secure EL1&0 translation regime, when EL2 is disabled
- Non-secure EL1&0 translation regime, when EL2 is disabled
- SECURE EL1&0 translation regime, when EL2 is enabled
- Non-secure EL1&0 translation regime, when EL2 is enabled
- Secure EL2&0 translation regime
- Non-secure EL2&0 translation regime
- Secure EL2 translation regime
- Non-secure EL2 translation regime
- Secure EL3 translation regime
3. How to enable MMU
- Set the page table base address TTBR
- Initialize MAIR_EL3
- Configure TCR_EL3
- create page table
- Enable MMU
4. MMU model
5. Page table attributes
PBHA, bits[62:59] : for FEAT_HPDS2
XN or UXN, bit[54] : Execute-never or Unprivileged execute-never
PXN, bit[53] : Privileged execute-never
Contiguous, bit[51] : translation table entry Yes Continuous, can exist in a TLB Entry
DBM, bit[51] : Dirty Bit Modifier
GP, bit[50] : for FEAT_BTI
nT, bit[16] : for FEAT_BBM
nG, bit[11] : translation cached in the TLB , whether to use ASID to identify
AF, bit[10] : Access flag, after AF=0, when accessing the page for the first time, the flag will be set to 1
SH, bits[9:8] : shareable attribute
AP[2: 1], bit[7:6] : Data Access Permissions bits
NS, bit[5] : Non-secure bit
Attrlndx[2:0], bits[4:2]
6. Memory Properties
| R or W | Meaning |
|---|---|
| 0b0 | No Allocate |
| 0b1 | Allocate |
| dd | Meaning |
|---|---|
| 0b00 | Device-nGnRnE memory |
| 0b01 | Device-nGnRE memory |
| 0b10 | Device-nGRE memory |
| 0b11 | Device-GRE memory |
