topic:
CPU provided a total of 16 address lines and 8 data lines, and with 
(active low) as a memory access control signal, 
for reading and writing command signal (high level read, write low). Existing memory chips following: ROM (2K × 8 bit, 4K × 4 bit, 8K × 8 bit), RAM (1K × 4 bit, 2K × 8 bit, 4K × 8 bits), and other decoders and gates 74138 circuitry (custom gate circuit). Suitable choice test specifications from the chip, the connection shown in FIG CPU and memory chips. Claim:
(1) Minimum 4K address system programming, the address range 4096 to 16383 for the user program area.
(2) indicate the type and quantity of memory chips selected.
(3) the chip select logic is shown in detail.
method one:
Weibo also pressed my view of the pressure too much, followed by a larger version
Method Two:
