Tesla Full Self Drive SoC chip size is 20 * 13mm = 260mm ^ 2,
using the process of SAMSUNG 14nm, the power consumption is about 36W;
The main modules are:
- CPU is Arm 3 Ge 4Core the Cortex-A72 @ 2.2GHz
- GPU is a @ 1GHz, FP64 ability 600GFLOPs
- NPU is 2 @ 2.0GHz processor of its own, the ability to FP8 is 38.86TFLOPs * 2 Ke
- Memory is supported: 128 bit LPDDR4-4266, then the memory bandwidth is: 2133MHz * 2DDR * 128bit / 8 /1000 = 68.256GB / s
FSD block diagram
Other Image signal processor such as an ISP is picture signal processor, a dedicated graphics processing chip.
The following highlights look at one of the NPU chip
NPU's Die Shot
It can be seen NPU own role to play 32MiB of SRAM cache for storing the results show the neural network, so do not frequent the memory to read further.
MAC can also be seen in the middle of the array is composed of Multiply Accumulate Cell, 96 * may provide calculating unit 96, i.e. calculating unit 9216 Cell.
And because each unit may fulfill the 8-bit and 32-bit Multiplying addition operation, so that a clock cycle is complete the operation 2 * 9216 = 18,432 times the int8.
And because the frequency of the NPU is 2GHz, can know the operational capacity is: 2GHz * 18432/1000 = 36.86TFLOPs (int8),
Do not forget there are two on each NPU FSD SoC.
NPU basis Cal Workflow
Operation is the data cache via activation function and weight calculation unit reaches, after re-entering the activation function calculation, until the cache back to the neural network calculation is completed.
NPU specific ISA
这个NPU有自己的比较简单的ISA，可以看出一共有8个指令，整个命令的长度可以从32b到256b。
另外NPU的功耗大约是7.5W。
最后特斯拉的板卡上搭载的是两个互相冗余备份的FSD SoC，能力还是蛮强大的一个片上系统。
参考文献：
fuse wikichip上对npu的指令集有深入的介绍
wikichip上对FSD的规格有详细的介绍