It has a series of small steps each instruction executed CPU. Roughly, the following steps:
1. Read the next instruction from memory, into the instruction register
2 changes the program counter points to the next instruction
3. determining the type of instruction
4. If the instruction is stored in memory with words, determine its position
5. this character is read, if necessary, read CPU registers
6. the execution of the instruction
7. back to step 1, the following instruction
These steps are commonly referred to as "read - decoding - execute" cycle, it is the core of all operations of the computer.
The above description about the CPU works programs written in English looks like.
2.3 shows this informal process to rewrite Java version, called interpreter. This machine has two interpreted a user program visible registers: the program counter (PC), a master address to the next request command, and the accumulator (the AC), as well as for accumulating registers with the arithmetic result. to save the current instruction, the current instruction type, the instruction operand address, and the current operand itself (data). Suppose instruction contains a simple memory address. It includes an operand memory location addresses, such as to be applied on the accumulator operands.
In fact, you can write a program to mimic the function of the CPU to indicate: a program is not covered by the electronics box (CPU) hardware performs. Instead, a program can be executed in a program called an interpreter, the interpreter request, checks, and another program instruction execution, as mentioned in Chapter.
This equivalence between the processor hardware and interpreters have a significant impact on the composition and design of computer systems computer. After detailed machine language for a new computer L, the design team may decide to build a hardware processor directly program on the implementation of L or write an interpreter to explain the program. If they decide to write an interpreter, they must also provide some hardware to run the machine interpreter. Indeed, the building can also be mixed, while some explanation of some software with hardware execution.
A command interpreter on the target machine split into small steps. Therefore, using an interpreter machine can do more than hardware processor simpler, less costly. Save performance on those machines have a large number of instructions such resources is particularly evident. The necessity of saving comes from the fact that: the hardware is gradually being software (interpreter) substitution, and copy hardware than the cost of copying software is much greater.
Early computer has a streamlined set of instructions. But the desire for more powerful computers has led to a more powerful, unique instructions. A long time ago, it has been found that a complex instruction usually has a faster execution speed, even if this unique instruction may lead to greater execution overhead. Floating-point instruction is a complex instruction. Support instructions directly connected to the array elements are also complex instructions. Sometimes it is easy to observe the same two continuous execution of instructions, the two instructions can be implemented with a simple work.
The more complex instructions, the better, because a separate operation performed sometimes overlap, or simultaneously with different hardware. In the high-performance computer, this additional hardware consumption of natural has its own rationale. In this case, high-performance computers have more instruction than low consumption computer. However, the demand for instruction compatibility and software development increasingly high price exacerbate the need for complex instructions, execution speed than even in the execution cost more importantly, the low-end computers, as well.
The late 1950s, IBM (then a major computer companies) to admit to launch a small group of computers that execute the same instruction, both for the IBM company or its users, these computers have many advantages. IBM introduced the term architecture to describe the level of compatibility of the new batch of computer Although only one architecture, but different devices could perform the same procedure, just different in terms of price and speed. But how to build a low-cost computer, allowing it to perform all the complex instructions on high-performance computers it?
The answer is hidden in the interpreter. The first advocate of this technology is Maurice Wilkes (1951), the interpreter allows the design of a computer is simple inexpensive, but can perform a large number of instructions. Result is the IBM System / 360 architecture, a group of compatible computer. Direct hardware implementation (i.e., non-implemented interpreter) is used on only the most expensive models.
Those simple computer using an interpreter directive also has some other advantages which the most important ones are:
1. to repair instructions do not execute properly, and even make up a design flaw in the underlying hardware
2. can add new instructions to minimize the cost, even in after the delivery of the machine.
3. organized design instruction, and efficient development of complex instruction, testing and documenting
Due to the rapid growth of computing power and a significant expansion of the computer market in the 1970s, the demand for low-end computers to promote the use of the interpreter in the field of computer design. In the design of the processor, and a set of custom hardware interpreter for a particular instruction is very cost-effective. Since the basic rapid advances in semiconductor technology, cost performance is more important than enhance, the interpreter-based architecture has become a practice in the field of computer design. In the 1970s, almost all new computers designed, from the microcomputer to large commercial servers are based interpreter.
The late 1970s, based on a simple processor interpreter widely used, in addition to those design the most expensive, highest performance, such as the Cray-1 and Control Data Cyber series. Interpreter digestion of those internal cost of restricting the complex instructions, so designers began to expand much more complex instructions, especially the expansion of the description of the way of the operands.
With the birth of Digital Equipment Corporation VAX computers, this trend reached a peak, which has hundreds of machine instructions and more than two hundred kinds of different ways to specify the number of operations per instruction for use. Unfortunately, it is envisaged in VAX architecture, from the beginning to achieve the interpreter, almost no consideration to achieve a high performance model. This vision has led to a lot of added value and critical instructions difficult to directly perform. This omission is devastating for the VAX, for the same DEC (Compaq, DEC proposed in 1998, Hewlett-Packard acquired Compaq in 2001).
Although the earliest octal microprocessor just simple machine with a simple instruction set of the late 1970s, even the microprocessor also evolved into a compiler-based design. One of the biggest challenges in this period, microprocessor designers faced by the integrated circuit is due to the growing complexity. A major advantage of using a compiler that can simplify the design of the processor, because of the enormous complexity is limited to the compiler occupied memory. So complex hardware design may become complicated software design.
Motorola 68000 is very successful, it has a huge set of instructions to explain, in the same period of Qi Geluo Z8000 has failed (Z8000 has an equal number of instruction set, but did not use an interpreter), failed Z8000 proves interpreter produce market in the fast It does have advantages over the desired microprocessor. This success has shaken the Qi Geluo first-mover advantage (Z8000 predecessors, Z80 is much more than 6800 popular predecessors 68000). Of course, other factors also played a role, as chip makers such as Motorola's long history and Ai Eriksson oil Company (Qi Geluo owner) as the long history of oil companies rather than the chip maker.
At that time, another factor in favor of the interpreter is the presence of fast read-only memory, also known as a control memory for storing interpreter. Assuming a typical instruction interpretation takes 10 instruction interpreter (referred to as microinstructions, each performing 100 ns), and the main memory accessed twice (each time 500 nanoseconds). The total execution time of 2000 ns, less than half the direct implementation of the fastest speed. If no control memory, which instruction will cost 6000 nanoseconds.