Computers Work
Stored program computer model
Von Neumann architecture
Von Neumann architecture as shown:
- Von Neumann architecture consists of five parts
- Operator: under the unified control of the controller, is responsible for data processing, perform various operations such as arithmetic operations, logical operations, displacement and comparison. Its data from memory, and sent to the calculation result memory.
- : Controller is a command and control center of the entire computer, controlled by (2, directly or indirectly, all the hardware devices in the computer) sends control signals to other devices, the control computer, so that it can automatically work in harmony.
- Memory: a computer system for storing information in the memory device, the data storage place for all of the computer
- Input and output devices, also known as I / O devices, all belong to the external computer apparatus.
- Inside the computer to represent the binary instructions and data;
- The write good programs and data into memory first, and then start the computer work, which is the basic meaning of storing the program.
Von Neumann architecture is a stored program computer, what is stored program computer? From a hardware point of view, assuming cpu and memory, both connected through a bus, there is a register within cpu called ip (instruction pointer), i.e., type X86 instruction pointer register in the CPU (CPU-type equivalent ARM program counter PC ). ip always points to the code segment in memory, cpu and then removed from the region pointed to an ip instruction, and executes the instruction, and an automatic ip, pointing to the instruction immediately, cpu removed and the instruction execution, and then automatically ip plus 1, cpu and then executed. . . Thus, program code stored in the memory, cpu sequential order through the execution of program code register ip. This is a hardware perspective of von Neumann architecture, all current computer has computing power are von Neumann architecture.
From the programmer point of view, can be abstracted as a computer program stored in the FIG., Which are abstracted as cpu for loop, always executed next struction. The main memory is saved instruction (instruction) data and data, i.e. code area and a data area. Works by storing instructions and data memory, cpu executes instructions one by one to explain.
ABI 和 API
CPU recognizes what kind of instructions directed to API (Application Programming Interface, Application Programming Interface) and ABI (Application Binary Interface Application Binary Interface), wherein the programmer interface API is an interface with the computer, the ABI is a program with the CPU interface interface this interface is related to three aspects: 1) encoding the assembler instruction 2) during use instruction registers used in 3) most of the instructions may access the memory. Wherein on x86 machines, each instruction execution are stored in eip cpu (32-bit machine instruction register), eip is increment by increment may be implemented eip cpu sequential execution of instructions, and may also be eip JMP ( jump instruction), ret, call instruction to modify the like, thus achieving cpu jump instruction is executed.
x86-32 assembler basis
x86-32 CPU registers
Four data registers (EAX, EBX, ECX, and EDX)
2 variant addresses and pointer register (ESI and EDI) 2 pointer register (ESP and EBP) 6 segment registers (ES, CS, SS, DS , FS , and GS )
an instruction pointer register (the EIP) a flag register (EFLAGS)
- Data register
Data register is primarily used to store operands and result information, etc., thereby saving the time required to read the operand bus and the access to the memory occupied. 32-bit CPU has four 32-bit general registers EAX, EBX, ECX, and EDX. Access to the lower 16-bit data, 16-bit high will not affect the data. These low 16-bit register named: AX, BX, CX, and DX, and it registers in the CPU of the previous match.
4 16-bit registers in turn divided into eight separate 8-bit registers (AX: AH-AL, BX : BH-BL, CX: CH-CL, DX: DH-DL), each register has its own name , independently accessible. This "can be combined" features programmer may utilize data registers, the flexibility to handle word / byte information.
Commonly referred to as AX and AL register accumulator (Accumulator), operations performed by the accumulator may take less time. The accumulator can be used for multiplication, addition, input / output or the like, a high frequency of use thereof; base register called register BX (Base Register). It may be used as a memory pointer; CX register called register count (Count Register). When circulation and string operations, it is used to control the number of cycles; bit operation, when the shift number, to indicate the number of bits shifted to use CL;
register DX called data registers (Data Register). Performing multiply, divide during operation, it may participate as the default operand arithmetic, it can also be used to store port addresses of I / O. In the 16-bit CPU in, AX, BX, CX and DX not be used as base address and index registers to store addresses of memory cells, but in the 32-bit CPU, which is 32-bit registers EAX, EBX, ECX, and EDX only data may be transmitted , temporary data save arithmetic logic operation, but also as a pointer register, these registers 32 is more universal. - The index register
32-bit CPU has two 32-bit general purpose registers ESI and EDI. Which corresponds to the lower 16 bits of the previous CPU SI and DI, access to the lower 16-bit data, 16-bit high does not affect data.
Register ESI, EDI, SI and DI index register called (Index Register), which is mainly used for an offset within the segment memory storage unit, which may be implemented with a variety of addressing mode of the memory operand for different address format of the storage unit to provide convenient access. Integral index register into 8-bit register. As a general register, it may store operands and results of arithmetic logic operations. They can be used for general memory pointer. During operation instruction execution string, the specific requirements thereof, but also has a special function. - Pointer register
32-bit CPU has two 32-bit general purpose registers EBP, and ESP. Which corresponds to the low 16-bit data of SBP in the previous CPU and the SP, the lower 16 bits of data is accessed, it does not affect the high 16 bits.
Register EBP, ESP, BP and called pointer register SP (Pointer Register), offset within the main storage unit for storing the stack, they may be implemented with a variety of addressing mode of the memory operand, the address for the different forms of to facilitate access to the storage unit. Indivisible pointer register into 8-bit registers. As a general register, it may store operands and results of arithmetic logic operations.
They are mainly used to access memory cells in the stack, and provides for:
on BP is the base pointer (Base Pointer) register, it can be directly accessed by the data stack;
the SP is the stack pointer (Stack Pointer) register, accessible only with top of the stack. - Segment registers
segment register is segmented according to the memory management is provided. The physical address of the memory cell by the value of the segment register and an offset combination
, so that two values are combined into fewer bits can be used to access a larger physical memory address space.
CPU internal segment registers:
CS - the code segment register (Code Segment Register), which segment is a code segment value;
DS - the data segment register (Data Segment Register), which segment is a data segment value;
ES- - additional segment register (Extra segment register), which is the additional segment data segment value;
SS-- stack segment register (stack segment register), which is the value segment stack segment;
FS - additional segment register (Extra segment register), which is the additional segment data segment value;
GS-- additional segment register (Extra segment register), which is the additional segment value data segment.
In the 16-bit CPU system, which only four segment registers, so that the program at any time at most 4 are in the segment can be accessed directly; in the 32-bit computer system, which has six segment registers, so that, here under the program development environment can simultaneously access up to six segments. CPU 32 has two different operating modes: real mode and protected mode. In each embodiment, the role of segment registers are different. Provisions briefly described as follows:
Real embodiment: the first four segment registers CS, DS, ES and SS entirely consistent with prior meaning corresponding to the segment registers in the CPU, the logical address of the memory cell remains "segment value: Offset "form. To access data in a memory segment, the segment registers and offset storage unit must be used.
Protection mode: In this mode, the situation is much more complex, is loaded into a segment register is no longer segment value, but referred to as "selectors" (Selector) a certain value. - Instruction pointer register
32 to the extended instruction pointer of the CPU 32, and recorded as the EIP, the lower 16 bits of EIP previous IP effect in the same CPU.
Instruction pointer EIP, IP (Instruction Pointer) instruction is to be executed next stored offset in the code segment. In a system having the prefetch instruction function, the instruction to be executed next has generally been prefetched into the instruction queue, except where metastasis. Therefore, in understanding their function, without regard to the presence of the instruction queue.
In real mode, since the maximum range of each segment is 64K, so that, in the high 16-bit EIP definitely is 0, this case corresponds only to reflect the execution order of instructions in the program with which the lower 16 bits of the IP. - Flag register
- Operation result flag
- Carry flag CF (Carry Flag)
carry flag CF is mainly used to reflect whether an arithmetic carry or borrow. If the highest bit of the result produces a carry or borrow, then its value is 1, otherwise its value is 0. When using this flag are: addition and subtraction of the number (byte) multiple word, unsigned magnitude comparison operation, shift operation, the shift between the word (byte), specifically a change instruction value CF and the like. - Parity flag PF (Parity Flag)
parity flag PF for parity calculation result is reflected in the number of "1". If the number of "1" is even, the PF 1 value, otherwise its value is 0.
PF can be performed using parity checking, or generate parity bits. In the data transfer process, in order to provide reliable delivery, if the parity check process, the flag can be used. - Auxiliary carry flag AF (Auxiliary Carry Flag)
in the following cases, the value of auxiliary carry flag AF is set to 1, otherwise its value is 0:- When word operations, when the low byte to high byte carry or borrow;
- When byte operation, when the upper 4 bits to four carry or borrow is low.
6 of the above calculation result flag in the general program, the flag CF2, high ZF, SF and OF use frequency, and the AF and PF flag lower frequency of use.
- Zero flag ZF (Zero Flag)
Zero flag ZF to reflect the operation result is zero. If the result is 0, the value is 1, otherwise its value is 0. In determining whether the operation result is 0, this flag can be used. - Sign flag SF (Sign Flag)
sign flag SF is used to reflect the operation result of the sign bit, which is identical to the highest bit of the result. In the computer system, using a signed number complement notation, therefore, it will reflect the sign SF of the result of the operation. When the operation result is positive, the SF is 0, otherwise its value is 1. - The overflow flag OF (Overflow Flag)
overflow flag OF is used to reflect a signed number addition and subtraction income calculation result is overflow. If the current arithmetic operation result exceeds the range that can be represented by the number of bits, it is called overflow value OF is set to 1, otherwise, the value OF is cleared to zero. "Overflow" and "carry" is the concept of two different meanings, not to be confused.
- Carry flag CF (Carry Flag)
- Operation result flag
How a computer works
experiment procedure
main.c file:
by gcc -S -o main.S main, c -m32 , which is available main.S This code disassembly code.
Which begins with removing the code, because this is the assembly language directive is addressed to the compiler to see, the code is not a real machine will be executed and then we get the following assembly code. "":.
Main.s file (treatment):
The assembler instructions frequently uses three registers ebp, esp and eax. ebp register is a base pointer; ESP stack pointer register is typically points to the top; EAX data can be temporarily stored, and also as the default storage location for the function return value.
From main.s file assembler code can be clearly seen three functions, wherein there is a repeated code
pushl %ebp
movl %esp, %ebp
This code appears in the initial portion of each function corresponds to preserve the scene, and leave at the end of a function command (recovery site), respectively.
to sum up
Undergraduate study has been compiled, the study and knowledge equivalent to register further deepened the understanding, the most important is to learn the related function call stack assembly instructions, such as call / ret and pushl / popl, as well as leave and enter. Through this experiment, let me have a more intuitive understanding of stack space and the corresponding EBP / ESP works.