1. pipelined pipeline
- MIPS is one of the simplest architecture, so prefer the university to introduce the MIPS architecture computing system architecture course.
– ARM has barrel shifter
shifter are two sides, on the one hand it can improve the speed of mathematical logic, on the other hand it also increases the complexity of the hardware. And you can perform the same function of the adder / shift register compared to more efficient, but also take up more chip area.
– MIPS have “branch delay slot” and “load delay slot”
MIPS compiler to resolve the above two issues. MIPS because the original design idea is to use a simple RISC hardware, and then rely on compilers and other software technologies to achieve the complete concept of RISC.
2. The instruction command structure
– MIPS have 32bit and 64bit architecture,but ARM only have 32bit architecture
64 local ARM11
- MIPS is an open architecture, users can add their own instructions in the kernel development process,
– ARM has 4-bit condition code in every instruction
ARM x86 at this point like. In the MIPS MIPS IV joined "conditional move" instruction to improve the efficiency of the pipeline.
– ARM has pre- and post-increment addressing modes
auto-increment/decrement on load/store instructions
- In terms of saving code space, MIPS16 very similar to the ARM Thumb
3. Register register
- Because MIPS cores have 32 registers (Register), while only 16 ARM, the inherent advantages of this structural design, decided in the same performance, MIPS chip area and power consumption will be smaller.
- ARM a group of special purpose registers cp0-cp15, can be used MCR, MRC other control instruction; corresponding, MIPS also cp0 0-30, using mfc0, mtc0 command control.
– Register banking in ARM. r8-r12 FIQ mode;r13:SP r14:LR
Not feel banked register any good.
– MIPS has a hard-wired-to-zero register ,but ARM not
MIPS use register $0 for Zero
4. Address space address space
- MIPS starting address is 0xbfc00000, there 4Mbyte size limit, but generally MIPS chip will take some of the ways to solve this problem.
ARM do not have this problem.
MIPS24K start address changed to the 0xbf000000, now there's a space 16Mbyte.
– MIPS don’t have to turn paging on to enable the cache.
MIPS have the address space for both cache and un-cache
but ARM need enable/disable cache
5. Function function
– Float point: MIPS64 has.
ARM’s support for FP is limited, and usually not included, and it is a 32 bit architecture
- ARM use JTAG, MIPS use EJTAG. Debug tools are generally supported by two. Use up feeling almost.
6. Performance performance
- more specific performance, because the difference is too large, it is difficult to separate who is good and who's bad. From personal experience in terms of MIPS4k and ARM9 are essentially the same level, but it seems better than the performance ARM9 MIPS4K good.
The same is the MIPS24K performance 32bit than MIPS4K has improved so much, should also be better than ARM9.
Because not used and MIPS34K ARM11 chip, can not compare, but it seems to be a feeling these two levels.
Cortex-A8 and MIPS 74K are the latest design, performance should be similar.
7. Application
- In the above 1000MHz applications, hard to find products using ARM architecture.
MIPS architecture with 200MHz or 266MHz in the following applications is relatively small, and this is precisely ARM's main market.
- ARM due to the low power consumption, commonly used in portable consumer electronics mobile phone / PDA and so on; MIPS in residential gateways, cable modems, cable set-top boxes, due to the development of multi-core MIPS, now a large multi-purpose gateway device also it.
- ARM hard-core license; MIPS soft core license, users can configure their own, doing their own products.
8. Future Development
- ARM's next generation towards multi-core structure, and the company's next-generation MIPS core then go to hardware multithreading function (multithreading)
MIPS 'multi-threading very similar to Intel's HyperThreading technology. From the current perspective of the development, multi-core prevail.
2008.12.21: In fact, today it seems, is not good pretend comment what good or bad, though, HT technology development on intel is not good (has basically been dual core) in place, but it can not be inferred on the MIPS MT development is not good, after all, mips applications are mostly embedded field, and the small size of the advantages of low power consumption of the chip MT just to play a role.
2008.12.29: MIPS is also not only multithreading, in fact, many of the MIPS cpu manufacturers have multi-core out of mips cpu in such cavium, broadcom, infineon, domestic Godson also a number of core products.
2009.6.11: MIPS multi-core development is clearly better than ARM. From Cavium, RMI, the company's products as evidenced by a large number of applications.
9. summary
I felt ARM and MIPS RISC there are many differences in the design of the beginning, but with the development of technology, their weaknesses, we will use good technique. For example, ARM11, and MIPS R1000 to use a lot of the same technology. RISC feeling to do the extreme on all the same.