11. The visible line memory problems

// ----------------------|----------------------|
//       线程 A           |     线程 B           |
//                       |                      |
//      |---------|      |     |---------|      |
//      |  控制器  |      |     |  控制器  |      |
//      |---------|      |     |---------|      |
//      |  运算器  |      |     |   运算器 |      |
//      |---------|      |     |---------|      |
//      | L1 Cache|      |     | L1 Cache|      |
//      |---------|      |     |---------|      |
// ---------------------------------------------|
//                  L2  Cache                   |
// ---------------------------------------------|
//                     主内存                    |
//      |---------|           |---------|       |
//      | 共享变量1|           | 共享变量2 |      |
//      |---------|           |---------|       |
// ---------------------------------------------|

If thread A and thread B process a simultaneously shared variable, as shown in FIG CPU architecture,
assuming thread A and thread B executed using different CPU and Cache current two are empty, this time due to the Cache will result memory problems are not visible, specifically to see the analysis below.

  • A first thread to get the value of the shared variable X, due to the two Cache did not hit, so load the main memory in the value of X, if zero.
    Then the value of X = O buffer cache to the two threads A modified value of X is 1, then writes two Cache, and flushed to main memory.
    A thread after the operation is completed, the value of the CPU where the two threads A Cache and main memory are X 1 inside.
  • Thread B acquired value X, a first of a cache miss, then look at two cache, L2 cache hit, it is returned X = 1.
    Here everything is normal, because this time the main memory is X = 1. The thread then modify the value of X is B 2,
    and store it into a Cache location and Thread 2 share two Cache, the main memory was last updated value of X is 2, here everything is okay.
  • A thread this time need to modify the value of X, a cache hit acquisition, and X = 1, here the question arises, obviously thread B has been modified to the value of X 2,
    why or 1 A thread get it ? This is the shared memory variables are not visible problem, which is the value of the thread B written on invisible thread A

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Origin www.cnblogs.com/fly-book/p/11367672.html