Rational use of NVM area

Lingke variety of core security encryption chip NVM area are set up, power-down because of its security features have not erased the physical characteristics and anti-brute, etc., many users will use the NVM area to store important data. Although simple to use, but there is little technical details easily overlooked. NVM area is 10 million times rewritable storage life of 10 years or life, so to combine the user to use their own business logic and application scenarios project a reasonable allocation to achieve efficient use of NVM area, expand the following description.
One problem: the updated data irrational logic
NVM area of the write operation is realized by the page, multi-page unit should be written. Example: Some users will be multiple sets of data stored in the NVM same page, but each change one set of data on the implementation of a write operation to the page, this is actually not advocated. The correct approach is to try a plurality of sets of data in the unified page update, this can effectively reduce the number of flash sector, extend the life of the NVM region.
Second problem: NVM area is divided address the inappropriate use of
the same reasons by the page operation, user data packets should be different page-aligned, to avoid the occurrence of data stored across pages. For example: Some user data in a set of successive addresses at the junction of the two, when the set of updated data writing operation, to the actual implementation of the two data write operations simultaneously, even if only a 2-byte data write, 1024 bytes will cause the region (assuming the target encryption chip NVM sector size is 512 bytes) to reduce the write endurance, this operation is not promoted.
Question three: NVM area without making security data loss caused by
write NVM area is composed of three steps, the first step of reading the original data in the target sector, in the second step of erasing the target sector data, the third step will the new data without making changes and modifications of the original data is written back to the target sector. Therefore, when the accidental power failure occurs, the encryption chip performs the second step just finished writing area NVM, the write operation can not complete the third step of the NVM region, the target region data will cause the disorder occurs irregularly. Of course, there are solutions, the next phase decomposition.