This paper s5pv210 SOC example to analyze its startup process
SOC s5pv210 inside, there is an internal ROM and a RAM inside
- The internal ROM is called IROM, it is a kind of norflash. Which is different from the external board inand / sd (mmc), which is an advantage without having to power up initialization can be used, the disadvantage is small, expensive ...
- The internal RAM is called SRAM, which is different from the external board DDR (DRAM), which is also the advantage of a power-on initialization without the need to use ... .. the disadvantage is small, expensive ...
Due Talia excellent properties, a lot of work after a power-on by the Talia to be responsible for the
1. Analyzing boot media
- First, a power-on, the setup code (called S5PV210 BLO), initialize the CPU clock, the watchdog off, and determined to start by reading the medium inside a particular cpu gpio IROM start SOC executed. (Note: IROM code can be executed directly, do not put the SRAM)
- For some SOC, they do not start to judge the medium by reading gpio, but according to the priority boot media, in order to try to start from various media start until the start of a successful start SOC media
2. The first portion is loaded boot code
- After determining the boot media, cpu IROM executes initialization code corresponding boot media, and start reading the amount of code U-boot header (16k for s5pv210 code is from a particular sector of the boot media, referred to as BL1 ), and then put to the SRAM and executed. In recent years, the U-boot these small piece of code called "SPL", and it began to support separate compilation
- Why not load the entire U-boot it directly? Because most of the SOC because of cost considerations, IROM do not, does not fit the entire U-boot
- Overall, since each SOC roughly the same this step, but may have subtle differences, specific reference manual to go. S5pv210 an example below to some of the details for the first portion of said boot code requirements:
When the medium starts to SD / MMC, must retain the sector 0, the code will start IROM BL1 is read from the first sector, allocating space boot media shown below 
while the other is directly from the boot media 0th sector storage BL1, IROM the code read beginning from BL1 sector 0, the operating space distribution medium as shown below 
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Then, we want to direct a first portion of an address code into the SRAM, SOC will typically add check codes in the first header, the first reason for the check is to prevent errors when reading from the boot media, generally used packaging tool manufacturers to add header checksum, or a parity added in the first U-boot source. For s5pv210, the first 16 bytes are parity bits BL1, D002_0010 real code from the beginning.
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Thus, the startup process ends Soc leading, followed by the first portion to the SRAM reposition the boot code, then loads the whole U-boot, and the boot kernel image. Detailed flow may go to the U-boot U-boot source code analysis and kernel boot process analysis.
- Source: https: //www.veryarm.com/41643.html
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Reproduced in: https: //www.cnblogs.com/duwenqidu/p/11057142.html