To understand why you want to align memory, we need to understand what is memory alignment
What is memory alignment
about what is memory alignment, let's look at a few examples
typedef struct {
int a;
double b;
short c;
}A;typedef struct {
int a;
short b;
double c;
}B;They were seeking to size, sizeof (A), sizeof ( B) results we get are different,
sizeof (A) = 24-and sizeof (B) = 16 Why would not the same result?
This is a very simple example, reflects the structure of the memory alignment rules.
In the structure, starting from the first address of the structure, the start address 0 is assumed.
A body structure is, A 4 bytes, bytes representing from 0 to 3, b is 8 bytes long double type, accounting for from 8 to 15 bytes, two bytes C, from 16 to 17 bytes.
B is for a structure, A 4 bytes, from 0 ~ 3, b is two bytes from 4 ~ 6; c 8 bytes from 8 to 15.
This is the memory alignment, alignment rules member declaration order, sequentially memory arrangement, which offset is an integer multiple of the size of the members, seen as an integral multiple of any member 0, the size of the final structure is an integer multiple of the largest member ( Therefore, the size here is 24 a, instead of 18).
C and C ++ hollow type and size of the empty structure
defines the memory occupied by the size of the hollow structure body and the empty class is 1 byte in C ++, because c ++ specified, any of the various objects can not have the same memory address (compiled automatically increasing a pointer body and the hollow structure to empty class distinction).
In the C language, occupied empty structure in memory size is 0. (gcc test is 0, other compilers may not)
Why memory alignment?
1. Platform reason (transplant reason): Not all hardware platforms can access any data on any address; some hardware platforms can take only certain types of data at a certain address, hardware or throw an exception.
2. For performance reasons (a hardware problem): cpu is the piece of memory as the block size may be 2,4,8,16 bytes, so the CPU reads the memory when a reading of a piece, size of a block is called (memory granularity) memory read size.
We look at why the memory is not aligned affect the reading speed?
Suppose the CPU to read the data into a 4-byte register (assuming that a memory read size is 4), two cases discussed:
1. Data byte 0
2. The data byte 1
Analysis: When the data from byte 0, the four bytes 0-3 directly to completely read to the register, the settlement completion.
When 1 byte of data from the beginning, the problem is very complex, first the first 4 bytes is first read register, and reading data bytes in the register 4-7 again, followed by the byte 0, 4,6, 7 bytes of data are removed, combined and finally 1,2,3,4-byte data into registers of a register memory unaligned so much additional operations greatly reduce the performance of the CPU.
But it also belongs to the optimistic case, one of the above-mentioned memory alignment is the role of transplant causes of the platform, because only part of the CPU work hard, the rest of the CPU has encountered an unaligned boundary direct strike.
Transfer: Why should the memory alignment and alignment rules