A few days ago, I made an article about a little difference between the JVM memory architecture, Java memory model and Java object model . Which, Java memory model, it is the knowledge that three points among one of the most obscure, but also involves a lot of background knowledge and relevant knowledge.
There are many online articles about Java memory model, the "in-depth understanding of the Java Virtual Machine" and "Java concurrent programming Art" and other books have also introduced on this knowledge points. However, after reading a lot of people still do not know, some people say that they even more senseless. In this paper, we introduce to the whole of Java memory model, the purpose is very simple, so you after reading this article, you know in the end what Java memory model is, why have the Java memory model, Java memory model to solve the problem and so on.
In this paper, there are many definitions and claims, are defined in understanding the author himself out after. Hoping to make the reader can have a clearer understanding of the Java memory model. Of course, if biased, please correct me.
Why have the Java Memory Model?
Before introducing the Java memory model, first look in the end what is computer memory model, and then look at what Java memory model do things on the basis of computer memory model. Say the computer's memory model, we should talk about some ancient history, why we need to look at memory model.
CPU and cache coherency
We should all know that computers in the implementation of the program, each instruction is executed in the CPU, and the implementation of the time, they will inevitably have to work with data. The above data and the computer, which is stored in the main memory, i.e. the physical memory of the computer.
At first, still live in peace, but with the development of CPU technology, the execution speed of the CPU faster. And because memory technology has not changed much, so the execution speed read and write data from memory and CPU compared to the process of the gap will be increasing, which causes the CPU to the memory of each operation has to spend a lot of waiting time.
It's like a startup, the beginning, the relationship between the founders and employees work enjoyable, but as the founder of ability and ambition more and more, and gradually the gap between staff appeared, more and more ordinary people with no on the pace of the CEO. The boss's every command, and then spread to the grass-roots workers, due to the lack of understanding of junior staff, ability to execute, it will spend a lot of time. This will slow down the efficiency of virtually the entire company.
But not because of slow read and write speed memory, not CPU technology now, we can not let the memory becomes the bottleneck of computer processing it.
So, people came up with a good way is to increase the cache between the CPU and memory. The concept of caching we all know, is to save a copy of the data. He is characterized by fast, small memory, and expensive.
Then, execution of the program becomes:
When the program is running, the operation will need data from the CPU to the main memory copy of the cache which then calculates the CPU can directly write its cache to read data from and wherein the data, when after the end of the operation, then the data cache to the main memory to refresh them.
After that, the company began setting up middle managers, executives report directly to CEO leadership, what leadership instructions, tell managers, then you can do your own thing. Management is responsible to coordinate the work of low-level employees. Because managers are men of understanding who and what they are responsible. , CEO and as long as the communication between managers so, most of the time, the company's various decision-making, notification is enough.
With the continuous improvement of CPU power, buffer layer slowly can not meet the requirements, it gradually rises to multi-level cache.
The data reading order and how tightly bound to the CPU, the cache can be divided into a CPU cache (L1), level two cache (L2), some high-end CPU, a three-level cache (L3), each one of the cache all are part of the data stored in a cache.
Technical difficulty and cost of manufacturing the three cache is relatively decreasing, so its capacity is relatively increasing.
So after having a multi-level cache, execution of the program becomes:
When the CPU to read a data, first from a cache, if not found then find the secondary cache, if you still do not find it from level three cache or memory.
With the company growing, the boss must manage things more and more, the company's management began to reform, began to appear upper, middle, bottom and other managers. Layer by layer management between the primary level.
A single-core CPU containing only L1, L2, L3 cache;
If the CPU core comprising a plurality of, i.e. a multi-core CPU, each core containing the set of L1 (and even L2) cache, a shared L3 (and or L2) cache.
The company also many different kinds, some companies only a big Boss, he was one person. But there are some companies such as co-general manager, partner and other mechanisms.
Single-core CPU as a company has only one owner, all commands from him, then you only need a management team enough.
Multi-core CPU as a company is co-founded by multiple partners, then we need to give each partner will set up a high-level management personnel for the direct leadership of their own, more partners to share the use of the company's low-level employees .
There are companies, has grown out of various subsidiaries began differential. A plurality of CPU that the various subsidiaries, no shared resources between each other. Independently of each other.
The figure below shows the structure of a single dual-core CPU cache.
As computer capabilities continue to improve, we began to support multi-threading. So the question came. We were to analyze single-threaded, multi-threaded influence in the single-core CPU, multi-core CPU.
Single-threaded. The core cpu cache is only one thread to access. Cache exclusive, and other issues an access violation does not occur.
Single-core CPU, multi-threading. After the plurality of threads in a process to access shared data simultaneously in the process, the CPU will load a block into the cache memory, when accessing different threads of the same physical address, are mapped to the same cache location, so that a thread switch occurs even , the cache is still not fail. But because any time only one thread in execution, it will not cache access violation occurs.
Multi-core CPU, multithreading. Each core has at least one L1 cache. Process multiple threads access a shared memory, and this multiple threads are executed on different cores, each core will keep a shared memory buffer in their caehe in. As the multi-core can be parallel, the situation may occur multiple threads simultaneously write their own caching, and data between each cache, there may be different.
Between the CPU and main memory to increase the cache may exist in a multi-threaded scenarios cache coherency problem , that is, in the multi-core CPU, each core its own cache, the cache content on the same data may be inconsistent .
If this company is a serial command issued, then there is no problem.
If this company commands are issued in parallel, then, and these orders are issued by the same the next CEO of this mechanism is also no problem. Because of his command by only one set of management systems.
If this company commands are issued in parallel, then, and these commands are issued by multiple partners, which have a problem. Because each partner will only order was given to managers directly under their own, while a number of management personnel management-level employees may be common.
For example, a partner to dismiss a staff, a partner 2 give employees a promotion, then again after he was fired promotion need more partners meeting resolution. Two partners were sent under the command of his management personnel. Partner 1 after the order was given, a manager in the dismissed employees, he knew the employee was fired. The partner management 2 2 before this time did not get the message, but also that the staff is a job, he is pleased to receive a partner to his promotion of a command.
And reordering optimization processor instructions
In the above-mentioned between the CPU and main memory cache increases, there will be a multi-threaded scenarios cache coherency problem . In addition to this case, there is a hardware problem is also more important. That is to bring the inside of the processor computing unit can be fully utilized as much as possible, the processor may be executed out of order code input process. This is the processor optimization .
In addition to current popular processors will optimize the code out of order processing, many programming language compilers will have a similar optimization, such as the Java virtual machine time compiler (JIT) would do the command rearrangement .
One can imagine that if allowed to optimize processor and compiler instruction reordering, then it could lead to various problems.
About adjustment of employee organization, if the Ministry of Personnel allowed to split the order execution or arbitrary rearrangement after receiving multiple commands, then the impact of this staff and this company is very large.
Concurrent programming problems
We said earlier concepts and related hardware you might hear a little Mongolian, and in the end he did not know anything to software. But on the issue of concurrent programming you should understand, such as atomic issues, the visibility of the issue and order problem.
In fact, the problem of atomicity, visibility problems and ordering issues. It is out of the abstract definition. And this problem is to abstract the underlying cache coherency problem mentioned earlier, a processor and instruction reordering optimization problems.
Here a brief review under these three issues are not going to look into expansion, interested readers can learn on their own. We say, concurrent programming, in order to ensure data security, need to meet the following three features:
Atomicity refers to a cpu operation is not suspended in the middle and then scheduling neither operation is interrupted, or executed, or do not execute.
Visibility means that when multiple threads access the same variable, a thread changes the value of this variable, other threads can immediately see the modified values.
Orderly sequence i.e. in the order of execution of the program execution code.
There are not found, cache coherency problem is actually a visibility problem . And Processor Optimization can cause atomic problems of. Instruction rearrangement that would result from ordering problems . So, later we will not mention those concepts hardware level, but direct use of the familiar atoms, visibility and orderliness.
Previously mentioned, cache coherency problems, the processor instruction reordering optimization problem is escalating due to hardware. So, is there any mechanism can solve these problems above it?
The most straightforward approach is to abolish processor and optimized processor technology, the abolition of CPU cache, main memory and the CPU to directly interact. However, although you can do to ensure concurrency issues in multithreaded. However, this little unworthy of.
Therefore, in order to ensure concurrent programming to meet the atomicity, visibility and orderliness. There is an important concept, that is - memory model.
To ensure the shared memory (visibility, order, atomicity), shared memory model defined specifications in the memory system read and write operation of a multithreaded program behavior. These rules regulate read and write operations to memory, so as to ensure the correctness of execution. It is associated with the processor, cache, but not with concurrency-related, and the compiler is also relevant. He solved the multi-level cache CPU, processor optimization, the instruction memory access problems as a result of the rearrangement, to ensure consistency, atomicity and ordering under concurrent scenarios.
Concurrency memory model to solve the problem mainly in two ways: limiting processor optimization and the use of memory barrier . This article will not go into the underlying principle to expand introduced, interested friends can learn on their own.
What is the Java Memory Model
Introduced in front of the computer memory model, which is an important specification to solve the problem of concurrent multi-threaded scenarios. So how is the concrete realization of it, different programming languages may differ in implementation.
We know, Java programs are required to run in a Java virtual machine above, Java memory model (Java Memory Model, JMM) is a kind of standard memory model in line, shielding the differences in access to a variety of hardware and operating systems to ensure that the Java program in a variety of platforms to access memory mechanism can ensure consistent results and specifications.
Java memory model mentioned, generally it refers to the new memory model JDK 5 started mainly by the JSR-133: Description JavaTM Memory Model and Thread Specification. Interested can see at this PDF document ( http://www.cs.umd.edu/~pugh/java/memoryModel/jsr133.pdf )
Java memory model specifies all the variables are stored in main memory, each thread also has its own working memory, working memory holds the thread in the thread is a copy of a copy of main memory used variables, variable thread All operations must be carried out in the working memory, but can not directly read and write main memory. Between different threads can not directly access the working memory of the other variables, the variables are passed between threads require data between their working memory and main memory simultaneously.
JMM while it acts on the data synchronization process between the working memory and the main memory. He sets out how to do and when to do data synchronization data synchronization.
There is mention of main memory and working memory, the reader is simple analogy to the concept of main memory and cache memory of the computer model. Of particular note is the main memory and working memory and JVM memory structures in the Java heap, stack, and other methods zone is not the same level of memory is divided, not directly analogous. "In-depth understanding of the Java Virtual Machine" in that, if we must reluctantly correspondence, then, from the variable, main memory, working memory, by definition, main memory, the main data portion of the corresponding object instance in the Java heap. Working memory corresponding to the partial region of the virtual machine stack.
Therefore, the summary again, is a specification JMM, since the purpose of solving multi-threaded communications, local memory data inconsistency exists through shared memory, the compiler will reorder code instructions, the processor would be out of order execution codes bring problems. Aim is to ensure atomicity concurrent programming scene, visibility and orderliness.
Implementation of the Java memory model
Learn Java multi-threaded friends all know, and offers a range of concurrent processing related keywords in Java, such as volatile, synchronized, final, concurrenand other packages. In fact, these are the Java memory model encapsulates the underlying implementation to provide some keywords programmers.
In the development of multi-threaded code, we can directly use synchronizedkeywords such as to control concurrent, never have to be concerned about the underlying compiler optimizations, cache coherence and other issues. Therefore, the Java memory model, in addition to define a set of specifications, but also offers a range of primitives, encapsulates the underlying implementation for developers directly.
This article is not ready to put all the keywords introduced one by one its usage, because usage of each keyword, the Internet has a lot of information. Readers can learn on their own. There is also a focus of this paper is to introduce, we mentioned earlier, concurrent programming to solve the atomicity, consistency and orderliness of the problem, we will look at, in Java, in what way were used to guarantee.
Atomicity
In Java, in order to ensure the atomicity, two advanced bytecode instructions monitorenterand monitorexit, 这两个字节码，在Java中对应的关键字就是synchronized`.
Thus, in Java can be used synchronizedto guarantee the operation of the method and the code blocks are atomic.
Visibility
Java memory model by modifying the value of the variable after the new sync back to main memory before reading the dependent variable main memory from the main memory refresh this variable's value as a way to transfer media to achieve.
In Java volatilekeyword provides a feature that is variable in its modified after being modified can be synchronized to the main memory immediately, by its modified variables are flushed from main memory before each is used. Therefore, you can use volatileto ensure the visibility of multi-threaded operation variables.
In addition volatile, Java in synchronizedand finaltwo keywords can be achieved visibility. But different implementations, this is no longer started.
Orderliness
In Java, you can use synchronizedand volatileto ensure the orderly operation among multiple threads. Implementation differ:
volatileKeywords will disable command rearrangement. synchronizedKeywords guarantee the same time allowing only one thread operations.
Well, here a brief introduction to concurrent programming in Java over atomicity, visibility and ordering of keywords that can be used to solve. Readers may find, as if synchronizedthe keyword is omnipotent, he can satisfy the above three properties at the same time, it is also a lot of people abusing synchronizedreasons.
But synchronizedis more performance impact, although the compiler optimization technology provides a lot of locks, but excessive use is not recommended.